ATmega88PA Automotive Atmel Corporation, ATmega88PA Automotive Datasheet - Page 202
ATmega88PA Automotive
Manufacturer Part Number
ATmega88PA Automotive
Description
Manufacturer
Atmel Corporation
- Current page: 202 of 371
- Download datasheet (12Mb)
21. USART in SPI Mode
21.1
21.2
21.3
202
Features
Overview
Clock Generation
Atmel ATmega48PA/88PA/168PA [Preliminary]
•
•
•
•
•
•
•
•
The Universal Synchronous and Asynchronous serial Receiver and Transmitter (USART) can
be set to a master SPI compliant mode of operation.
Setting both UMSELn1:0 bits to one enables the USART in MSPIM logic. In this mode of oper-
ation the SPI master control logic takes direct control over the USART resources. These
resources include the transmitter and receiver shift register and buffers, and the baud rate
generator. The parity generator and checker, the data and clock recovery logic, and the RX
and TX control logic is disabled. The USART RX and TX control logic is replaced by a com-
mon SPI transfer control logic. However, the pin control logic and interrupt generation logic is
identical in both modes of operation.
The I/O register locations are the same in both modes. However, some of the functionality of
the control registers changes when using MSPIM.
The Clock Generation logic generates the base clock for the Transmitter and Receiver. For
USART MSPIM mode of operation only internal clock generation (i.e. master operation) is
supported. The Data Direction Register for the XCKn pin (DDR_XCKn) must therefore be set
to one (i.e. as output) for the USART in MSPIM to operate correctly. Preferably the
DDR_XCKn should be set up before the USART in MSPIM is enabled (i.e. TXENn and
RXENn bit set to one).
The internal clock generation used in MSPIM mode is identical to the USART synchronous
master mode. The baud rate or UBRRn setting can therefore be calculated using the same
equations, see
Full Duplex, Three-wire Synchronous Data Transfer
Master Operation
Supports all four SPI Modes of Operation (Mode 0, 1, 2, and 3)
LSB First or MSB First Data Transfer (Configurable Data Order)
Queued Operation (Double Buffered)
High Resolution Baud Rate Generator
High Speed Operation (f
Flexible Interrupt Generation
Table
21-1.
XCKmax
= f
CK
/2)
9223B–AVR–09/11
Related parts for ATmega88PA Automotive
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
Part Number:
Description:
MCU AVR 8K ISP FLSH 20MHZ 32TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU AVR 8K ISP FLASH 20MHZ 32QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU AVR 8K ISP FLASH 20MHZ 28DIP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
Manufacturer:
Atmel Corporation
Datasheet:
Part Number:
Description:
MCU AVR 8KB FLASH 20MHZ 32TQFP
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
MCU AVR 8KB FLASH 20MHZ 32QFN
Manufacturer:
Atmel
Datasheet:
Part Number:
Description:
Atmega88p 8-bit Microcontroller With 8k Bytes In-system Programmable Flash
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet:
Part Number:
Description:
Monolithic Integrated Feature Phone Circuit
Manufacturer:
ATMEL Corporation
Datasheet: