SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 627
SAM3S8B
Manufacturer Part Number
SAM3S8B
Description
Manufacturer
Atmel Corporation
- Current page: 627 of 1143
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29.10.5.5
Figure 29-30. Repeated Start + Reversal from Read to Write Mode
Figure 29-31. Repeated Start + Reversal from Write to Read Mode
Notes:
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
TWI_RHR
TWI_RHR
TWI_THR
TWI_THR
TXCOMP
TXCOMP
EOSACC
EOSACC
SVREAD
SVREAD
Reversal of Read to Write
Reversal of Write to Read
RXRDY
RXRDY
SVACC
SVACC
TXRDY
TXRDY
TWD
TWD
1. In this case, if TWI_THR has not been written at the end of the read command, the clock is automatically stretched before
2. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
the ACK.
Reversal after a Repeated Start
S
S
As soon as a START is detected
As soon as a START is detected
SADR
SADR
The master initiates the communication by a read command and finishes it by a write command.
Figure 29-30 on page 627
1. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
The master initiates the communication by a write command and finishes it by a read command.
Figure 29-31 on page 627
W
R
Read TWI_RHR
A
A
DATA0
DATA0
DATA0
A
A
DATA0
DATA1
DATA1
DATA1
describes the repeated start + reversal from Read to Write mode.
describes the repeated start + reversal from Write to Read mode.
NA
A
DATA1
Sr
Sr
SADR
SADR
Cleared after read
Cleared after read
R
W
DATA2
A
A
DATA2
DATA2
DATA2
A
A
SAM3S8/SD8
SAM3S8/SD8
DATA3
DATA3
DATA3
DATA3
NA
A
P
P
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