AD6672 Analog Devices, AD6672 Datasheet - Page 4

• Manufacturer Part Number: AD6672
• Description: IF Receiver
• Manufacturer: Analog Devices

Specifications of AD6672

• Resolution (bits): 11bit
• # Chan: 1
• Sample Rate: 250MSPS
• Interface: LVDS
• Analog Input Type: Diff-Uni
• Ain Range: 1.75 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD6672
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.75 V p-p full-scale input range,
DCS enabled, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
TEMPERATURE DRIFT
INPUT-REFERRED NOISE
ANALOG INPUT
POWER SUPPLIES
POWER CONSUMPTION
1
2
3
Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
Input capacitance refers to the effective capacitance between one differential input pin and AGND. See
Standby power is measured with a dc input, the CLK pin inactive (set to AVDD or AGND).
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Offset Error
Gain Error
VREF = 1.0 V
Input Span
Input Capacitance
Input Resistance
Input Common-Mode Voltage
Supply Voltage
Supply Current
Sine Wave Input (DRVDD = 1.8 V, NSR Disabled)
Sine Wave Input (DRVDD = 1.8 V, NSR Enabled,
Sine Wave Input (DRVDD = 1.8 V, NSR Enabled,
Standby Power
Power-Down Power
AVDD
DRVDD
I
I
I
I
22% Bandwidth Mode)
33% Bandwidth Mode)
AVDD
DRVDD
DRVDD
DRVDD
1
1
1
1
(NSR Disabled)
(NSR Enabled, 22% Bandwidth Mode)
(NSR Enabled, 33% Bandwidth Mode)
3
2
1
Temperature
Full
Full
Full
Full
Full
25°C
Full
25°C
Full
Full
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Rev. 0 | Page 4 of 32
Min
11
1.7
1.7
Figure 18
0.65
Typ
±0.1
±0.12
±7
±85
1.75
5
20
0.9
1.8
1.8
136
63
89
99
358
405
423
50
5
Guaranteed
for the equivalent analog input structure.
Max
±11
+3/−6.5
±0.2
±0.3
1.9
1.9
145
68
385
Unit
Bits
LSB
LSB
LSB rms
mV
% FSR
LSB
LSB
ppm/°C
ppm/°C
V p-p
pF
kΩ
V
V
V
mA
mA
mA
mA
mW
mW
mW
mW
mW