AD9613 Analog Devices, AD9613 Datasheet - Page 13

• Manufacturer Part Number: AD9613
• Description: 12-bit, 170/210/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
• Manufacturer: Analog Devices

Specifications of AD9613

• Resolution (bits): 12bit
• # Chan: 2
• Sample Rate: 250MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Bip
• Ain Range: 1.75 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Data Sheet
Pin No.
Digital Outputs
SPI Control
Output Enable Bar and
Power-Down
14
13
16
15
18
17
21
20
23
22
27
26
30
29
32
31
34
33
36
35
39
38
41
40
43
42
25
24
45
44
46
47
48
OR−
Mnemonic
D0+ (LSB)
D0− (LSB)
D1+
D1−
D2+
D2−
D3+
D3−
D4+
D4−
D5+
D5−
D6+
D6−
D7+
D7−
D8+
D8−
D9+
D9−
D10+
D10−
D11+ (MSB)
D11− (MSB)
OR+
DCO+
DCO−
SCLK
SDIO
CSB
OEB
PDWN
Type
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input/Output
Input
Input/Output
Input/Output
Rev. B | Page 13 of 36
Description
Channel A/Channel B LVDS Output Data 0—True.
Channel A/Channel B LVDS Output Data 0—Complement.
Channel A/Channel B LVDS Output Data 1—True.
Channel A/Channel B LVDS Output Data 1—Complement.
Channel A/Channel B LVDS Output Data 2—True.
Channel A/Channel B LVDS Output Data 2—Complement.
Channel A/Channel B LVDS Output Data 3—True.
Channel A/Channel B LVDS Output Data 3—Complement.
Channel A/Channel B LVDS Output Data 4—True.
Channel A/Channel B LVDS Output Data 4—Complement.
Channel A/Channel B LVDS Output Data 5—True.
Channel A/Channel B LVDS Output Data 5—Complement.
Channel A/Channel B LVDS Output Data 6—True.
Channel A/Channel B LVDS Output Data 6—Complement.
Channel A/Channel B LVDS Output Data 7—True.
Channel A/Channel B LVDS Output Data 7—Complement.
Channel A/Channel B LVDS Output Data 8—True.
Channel A/Channel B LVDS Output Data 8—Complement.
Channel A/Channel B LVDS Output Data 9—True.
Channel A/Channel B LVDS Output Data 9—Complement.
Channel A/Channel B LVDS Output Data 10—True.
Channel A/Channel B LVDS Output Data 10—Complement.
Channel A/Channel B LVDS Output Data 11—True.
Channel A/Channel B LVDS Output Data 11—Complement.
Channel A/Channel B LVDS Overrange—True.
Channel A/Channel B LVDS Overrange—Complement.
Channel A/Channel B LVDS Data Clock Output—True.
Channel A/Channel B LVDS Data Clock Output—Complement.
SPI Serial Clock.
SPI Serial Data I/O.
SPI Chip Select (Active Low).
Output Enable Bar Input (Active Low).
Power-Down Input (Active High). Operation depends upon SPI mode;
this input can be configured as power-down or standby. For further
description, refer to Table 14.
AD9613