AD7147A Analog Devices, AD7147A Datasheet - Page 46

• Manufacturer Part Number: AD7147A
• Manufacturer: Analog Devices

Specifications of AD7147A

• Resolution (bits): 16bit
• # Chan: 13
• Sample Rate: 111SPS
• Interface: I²C/Ser 2-Wire,Ser,SPI
• Analog Input Type: Capacitive
• Ain Range: ± 8 pF (Delta C)
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD7147A
Table 28. STAGE_COMPLETE_INT_ENABLE Register
Address
0x007
Data Bit
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[15:13]
Default
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
STAGE8_COMPLETE_INT_ENABLE
STAGE10_COMPLETE_INT_ENABLE
STAGE11_COMPLETE_INT_ENABLE
Unused
Name
STAGE0_COMPLETE_INT_ENABLE
STAGE1_COMPLETE_INT_ENABLE
STAGE2_COMPLETE_INT_ENABLE
STAGE3_COMPLETE_INT_ENABLE
STAGE4_COMPLETE_INT_ENABLE
STAGE5_COMPLETE_INT_ENABLE
STAGE6_COMPLETE_INT_ENABLE
STAGE7_COMPLETE_INT_ENABLE
STAGE9_COMPLETE_INT_ENABLE
GPIO_INT_ENABLE
Rev. B | Page 46 of 68
Description
STAGE0 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE0 conversion
STAGE1 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE1 conversion
STAGE2 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE2 conversion
STAGE3 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE3 conversion
STAGE4 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE4 conversion
STAGE5 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE5 conversion
STAGE6 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE6 conversion
STAGE7 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE7 conversion
STAGE8 conversion complete interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE8 conversion
STAGE9 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE9 conversion
STAGE10 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE10 conversion
STAGE11 conversion interrupt control
0 = interrupt source disabled
1 = INT asserted at completion of STAGE11 conversion
Interrupt control when GPIO input pin changes level
0 = disabled
1 = enabled
Set to 0