AD9222 Analog Devices, AD9222 Datasheet - Page 23

• Manufacturer Part Number: AD9222
• Description: Octal, 12-Bit, 40/50/65 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: Analog Devices

Specifications of AD9222

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 65MSPS
• Interface: LVDS,Ser
• Analog Input Type: Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

Data Sheet
For best dynamic performance, the source impedances driving
VIN + x and VIN − x should be matched such that common-
mode settling errors are symmetrical. These errors are reduced
by the common-mode rejection of the ADC. An internal
reference buffer creates the positive and negative reference
voltages, REFT and REFB, respectively, that define the span of
the ADC core. The output common-mode of the reference buffer
is set to midsupply, and the REFT and REFB voltages and span
are defined as
It can be seen from these equations that the REFT and REFB
voltages are symmetrical about the midsupply voltage and, by
definition, the input span is twice the value of the VREF voltage.
Maximum SNR performance is achieved by setting the ADC to
the largest span in a differential configuration. In the case of the
AD9222, the largest input span available is 2 V p-p.
Differential Input Configurations
There are several ways to drive the
passively; however, optimum performance is achieved by
driving the analog input differentially. For example, using the
AD8334
excellent performance and a flexible interface to the ADC (see
Figure 62) for baseband applications. This configuration is
commonly used for medical ultrasound systems.
For applications where SNR is a key parameter, differential
transformer coupling is the recommended input configuration
(see Figure 59 and Figure 60) because the noise performance of
most amplifiers is not adequate to achieve the true performance
of the AD9222.
Regardless of the configuration, the value of the shunt capacitor,
C, is dependent on the input frequency and may need to be
reduced or removed.
REFT = 1/2 (AVDD + VREF)
REFB = 1/2 (AVDD − VREF)
Span = 2 × (REFT − REFB) = 2 × VREF
differential driver to drive the
1V p-p
0.1μF
AD9222
120nH
AD9222
0.1μF
22pF
Figure 62. Differential Input Configuration Using the AD8334
either actively or
18nF
provides
INH
LMD
274Ω
LNA
LON
LOP
AD8334
0.1μF
Rev. F | Page 23 of 60
0.1μF
VIP
VIN
VGA
VOH
2V p-p
Single-Ended Input Configuration
A single-ended input may provide adequate performance in
cost-sensitive applications. In this configuration, SFDR and
distortion performance degrade due to the large input common-
mode swing. If the application requires a single-ended input
configuration, ensure that the source impedances on each input
are well matched in order to achieve the best possible performance.
A full-scale input of 2 V p-p can still be applied to the ADC’s
VIN + x pin while the VIN − x pin is terminated. Figure 61 details
a typical single-ended input configuration.
VOL
1
2V p-p
2V p-p
1
Figure 60. Differential Transformer-Coupled Configuration for IF Applications
C
C
DIFF
DIFF
187Ω
65Ω
IS OPTIONAL.
187Ω
IS OPTIONAL.
374Ω
16nH
Figure 59. Differential Transformer-Coupled Configuration
1kΩ
1kΩ
AVDD
49.9Ω
0.1μF
0.1μF
49.9Ω
0.1μF
1.0kΩ
1.0kΩ
1kΩ
1kΩ
Figure 61. Single-Ended Input Configuration
0.1μF
0.1µF
AVDD
ADT1–1WT
1:1 Z RATIO
ADT1–1WT
1:1 Z RATIO
AVDD
0.1µF
R
R
for Baseband Applications
0.1μF
1kΩ 25Ω
1kΩ
C
10μF
1kΩ
1kΩ
0.1μF
499Ω
AVDD
16nH
16nH
AVDD
C
C
VIN – x
VIN + x
1kΩ
1kΩ
R
R
DIFF
DIFF
AD9222
R
2.2pF
33Ω
33Ω
R
C
C
ADC
1
C
C
1
1kΩ
VIN + x
VIN – x
VIN – x
VIN + x
AD9222
AD9222
ADC
ADC
AGND
VIN + x
VIN – x
AD9222
AD9222
ADC