AD7691 Analog Devices, AD7691 Datasheet - Page 17

• Manufacturer Part Number: AD7691
• Manufacturer: Analog Devices

Specifications of AD7691

• Resolution (bits): 18bit
• # Chan: 1
• Sample Rate: 250kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: CSP,SOP

POWER SUPPLY
The AD7691 uses two power supply pins: a core supply (VDD) and
a digital input/output interface supply (VIO). VIO allows direct
interface with any logic between 1.8 V and VDD. To reduce the
supplies needed, the VIO and VDD pins can be tied together. The
AD7691 is independent of power supply sequencing between VIO
and VDD. Additionally, it is very insensitive to power supply
variations over a wide frequency range, as shown in Figure 25.
The AD7691 powers down automatically at the end of each
conversion phase, and therefore, the power scales linearly with
the sampling rate. This makes the part ideal for low sampling
rate (as low as a few hertz) and low battery-powered applications.
SUPPLYING THE ADC FROM THE REFERENCE
For simplified applications, the AD7691, with its low operating
current, can be supplied directly using the reference circuit
shown in Figure 34. The reference line can be driven by
The system power supply directly.
A reference voltage with enough current output capability, such
A reference buffer, such as the AD8031, which can also filter the
as the ADR43x.
system power supply, as shown in Figure 34.
0.001
1000
0.1
10
10
Figure 33. Operating Current vs. Sample Rate
100
SAMPLING RATE (SPS)
1k
VDD = 5V
10k
VIO
100k
1M
Rev. B | Page 17 of 28
DIGITAL INTERFACE
Though the AD7691 has a reduced number of pins, it offers
flexibility in its serial interface modes.
When in CS mode, the AD7691 is compatible with SPI, QSPI,
digital hosts, and DSPs, for example, Blackfin® ADSP-BF53x or
ADSP-219x. In this mode, the AD7691 can use either a 3-wire
or 4-wire interface. A 3-wire interface using the CNV, SCK, and
SDO signals minimizes wiring connections and is useful, for
instance, in isolated applications. A 4-wire interface using the
SDI, CNV, SCK, and SDO signals allows CNV, which initiates
the conversions, to be independent of the readback timing
(SDI). This is useful in low jitter sampling or simultaneous
sampling applications.
When in chain mode, the AD7691 provides a daisy-chain
feature using the SDI input for cascading multiple ADCs on a
single data line similar to a shift register.
The mode in which the part operates depends on the SDI level
when the CNV rising edge occurs. The CS mode is selected if
SDI is high, and the chain mode is selected if SDI is low. The
SDI hold time is such that when SDI and CNV are connected
together, the chain mode is selected.
In either mode, the AD7691 offers the option of forcing a start
bit in front of the data bits. This start bit can be used as a busy
signal indicator to interrupt the digital host and trigger the data
reading. Otherwise, without a busy indicator, the user must
timeout the maximum conversion time prior to readback.
The busy indicator feature is enabled
In the CS mode if CNV or SDI is low when the ADC
In the chain mode if SCK is high during the CNV rising edge
1
5V
conversion ends (see
(see Figure 46).
OPTIONAL REFERENCE BUFFER AND FILTER.
10kΩ
1µF
Figure 34. Example of an Application Circuit
5V
AD8031
Figure 38
1
10µF
5V
and
REF
Figure 42
10Ω
AD7691
VDD
).
AD7691
1µF
VIO