AD7829-1 Analog Devices, AD7829-1 Datasheet - Page 7

• Manufacturer Part Number: AD7829-1
• Description: 3 V/5 V, 2 MSPS, 8-Bit, 8-Channel ADC
• Manufacturer: Analog Devices

Specifications of AD7829-1

• Resolution (bits): 8bit
• # Chan: 8
• Sample Rate: 2MSPS
• Interface: Par
• Analog Input Type: SE-Uni
• Ain Range: 2 V p-p,2.5V p-p,Uni 2.0V,Uni 2.5V
• Adc Architecture: Flash
• Pkg Type: SOIC,SOP

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
12 to 19
22
23
7
4
8
5
6
9 to 11
1 to 3,
24 to 28
21
20
Mnemonic
V
V
AGND
DGND
CONVST
EOC
CS
RD
A2 to A0
DB2 to DB0,
DB7 to DB3
V
V
IN8
DD
REF IN/OUT
MID
to V
IN1
Digital Ground. Ground reference for digital circuitry.
Description
Analog Input Channels. The AD7829-1 has eight analog input channels. The inputs have an input span of 2.5 V
and 2 V, depending on the supply voltage (V
using the V
(V
Positive Supply Voltage, 3 V ± 10% and 5 V ± 10%.
Analog Ground. Ground reference for track/hold, comparators, reference circuit, and multiplexer.
Logic Input Signal. The convert start signal initiates an 8-bit analog-to-digital conversion on the falling edge
of this signal. The falling edge of this signal places the track/hold in hold mode. The track/hold goes into track
mode again 120 ns after the start of a conversion. The state of the CONVST signal is checked at the end of a
conversion. If it is logic low, the AD7829-1 powers down (see the Operating Modes section).
Logic Output. The end of conversion signal indicates when a conversion has finished. The signal can be used
to interrupt a microcontroller when a conversion has finished or latch data into a gate array (see the Parallel
Interface section).
Logic Input Signal. The chip select signal is used to enable the parallel port of the AD7829. This is necessary
if the ADC is sharing a common data bus with another device.
Logic Input Signal. The read signal is used to take the output buffers out of their high impedance state and drive
data onto the data bus. The signal is internally gated with the CS signal. Both RD and CS must be logic low to
enable the data bus.
Channel Address Inputs. The address of the next multiplexer channel must be present on these inputs when
the RD signal goes low.
Data Output Lines. They are normally held in a high impedance state. Data is driven onto the data bus when
both RD and CS go active low.
Analog Input and Output. An external reference can be connected to the AD7829-1 at this pin. The on-chip
reference is also available at this pin. When using the internal reference, this pin can be left unconnected or,
in some cases, it can be decoupled to AGND with a 0.1 μF capacitor.
The V
(see the Analog Input section).
DD
= 5 V ± 10%). See the Analog Input section of the data sheet for more information.
MID
pin, if connected, is used to center the analog input span anywhere in the range of AGND to V
MID
pin. The default input range (V
CONVST
DGND
EOC
DB2
DB1
DB0
V
V
V
CS
RD
A2
A1
A0
IN8 12
IN7 13
IN6 14
Figure 3. Pin Configuration
10
11
1
2
3
4
5
6
7
8
9
Rev. 0 | Page 7 of 20
(Not to Scale)
AD7829-1
TOP VIEW
DD
MID
). This span can be centered anywhere in the range AGND to V
28
27
26
25
24
23
22
21
20
19
18
17
16
15
unconnected) is AGND to 2 V (V
DB3
DB4
DB5
DB6
DB7
AGND
V
V
V
V
V
V
V
V
DD
REF IN/OUT
MID
IN1
IN2
IN3
IN4
IN5
DD
= 3 V ± 10%) or AGND to 2.5 V
AD7829-1
DD
DD