AD7760 Analog Devices, AD7760 Datasheet - Page 18

• Manufacturer Part Number: AD7760
• Description: 2.5 MSPS, 24-Bit, 100 dB Sigma-Delta ADC with On-Chip Buffer
• Manufacturer: Analog Devices

Specifications of AD7760

• Resolution (bits): 24bit
• # Chan: 1
• Sample Rate: 40MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: 4 V p-p,6.5 V p-p
• Adc Architecture: Sigma-Delta
• Pkg Type: QFP

AD7760
THEORY OF OPERATION
The AD7760 employs a Σ-Δ conversion technique to convert
the analog input into an equivalent digital word. The modulator
samples the input waveform and outputs an equivalent digital
word to the digital filter at a rate equal to ICLK.
By employing oversampling, the quantization noise is spread
across a wide bandwidth from 0 to f
noise energy contained in the signal band of interest is reduced
(see Figure 40a). To further reduce the quantization noise in the
signal band of interest, a high order modulator is employed to
shape the noise spectrum so that most of the noise energy is
shifted out of the signal band (see Figure 40b).
The digital filtering that follows the modulator removes the
large out-of-band quantization noise (see Figure 40c) while also
reducing the data rate from f
f
decimation rate used.
Digital filtering has certain advantages over analog filtering: It
does not introduce significant noise or distortion and can be
made perfectly linear in terms of phase.
The AD7760 employs three FIR filters in series. By using
different combinations of decimation ratios, filter selection,
and bypassing, data can be obtained from the AD7760 at a large
range of data rates. Multibit data from the modulator can be
obtained at the ICLK rate (see Modulator Data Output Mode
section). The first filter receives the data from the modulator at
a maximum frequency of 20 MHz and decimates it by 4 to output
the data at 5 MHz. The partially filtered data can be output at
this stage. The second filter allows the decimation rate to be
chosen from 2× to 32× or to be completely bypassed.
Table 6. Configuration with Default Filter
ICLK
Frequency
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
20 MHz
12.288 MHz
12.288 MHz
12.288 MHz
12.288 MHz
ICLK
/8 or less at the output of the filter, depending on the
4×
4×
4×
4×
4×
4×
4×
4×
4×
4×
4×
4×
4×
4×
4×
Filter 1
Bypassed
4×
Filter 2
Bypassed
Bypassed
Bypassed
2×
2×
4×
4×
8x
8×
16×
16×
32×
32×
8×
16×
32×
32×
ICLK
at the input of the filter to
ICLK
. This means that the
Filter 3
Bypassed
Bypassed
2×
Bypassed
2×
Bypassed
2×
Bypassed
2×
Bypassed
2×
Bypassed
2×
2×
2×
Bypassed
2×
Data State
Unfiltered
Partially filtered
Fully filtered
Partially filtered
Fully filtered
Partially filtered
Fully filtered
Partially filtered
Fully filtered
Partially filtered
Fully filtered
Partially filtered
Fully filtered
Fully filtered
Fully filtered
Partially filtered
Fully filtered
Rev. A | Page 18 of 36
The third filter has a fixed decimation rate of 2×, is user
programmable, and has a default configuration. It is described
in detail in the Programmable FIR Filter section. This filter can
also be bypassed.
Table 6 shows some characteristics of the default filter. The
group delay of the filter is defined to be the delay to the center
of the impulse response and is equal to the computation plus
the filter delays. The delay until valid data is available (the
DVALID status bit is set) is equal to twice the filter delay plus
the computation delay.
Computation
Delay
0
0.325 μs
1.075 μs
1.35 μs
1.625 μs
1.725 μs
1.775 μs
2.6 μs
2.25 μs
4.175 μs
3.1 μs
7.325 μs
4.65 μs
3.66 μs
5.05 μs
11.92 μs
7.57 μs
BAND OF INTEREST
BAND OF INTEREST
BAND OF INTEREST
Filter Delay
0
1.2 μs
10.8 μs
3.6 μs
22.8 μs
6 μs
44.4 μs
10.8 μs
87.6 μs
20.4 μs
174 μs
39.6 μs
346.8 μs
142.6 μs
283.2 μs
64.45 μs
564.5 μs
DIGITAL FILTER CUTOFF FREQUENCY
QUANTIZATION NOISE
NOISE SHAPING
Figure 40. Σ-Δ ADC
b.
c.
a.
Pass-Band
Bandwidth
500 kHz
250 kHz
140.625 kHz
125 kHz
70.3125 kHz
62.5 kHz
35.156 kHz
31.25 kHz
76.8 kHz
38.4 kHz
21.6 kHz
19.2 kHz
10 MHz
1.35 MHz
1 MHz
562.5 kHz
281.25 kHz
f
f
f
ICLK
ICLK
ICLK
Output Data
Rate (ODR)
5 MHz
1.25 MHz
625 kHz
625 kHz
312.5 kHz
312.5 kHz
156.25 kHz
156.25 kHz
78.125 kHz
192 kHz
96 kHz
96 kHz
48 kHz
20 MHz
2.5 MHz
2.5 MHz
1.25 MHz
\2
\2
\2