AD7746 Analog Devices, AD7746 Datasheet - Page 13

• Manufacturer Part Number: AD7746
• Description: 24-bit, 2 Channel Capacitance to Digital Converter
• Manufacturer: Analog Devices

Specifications of AD7746

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: n/a
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (2Vref) p-p,± 4 pF (Delta C)
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

If a repeated start condition is encountered after the address
pointer byte, all peripherals connected to the bus respond
exactly as outlined above for a start condition, that is, a repeated
start condition is treated the same as a start condition. When a
master device issues a stop condition, it relinquishes control of
the bus, allowing another master device to take control of the
bus. Hence, a master wanting to retain control of the bus issues
successive start conditions known as repeated start conditions.
AD7745/AD7746 RESET
To reset the AD7745/AD7746 without having to reset the entire
I
particular address pointer word as a command word to reset the
part and upload all default settings. The AD7745/AD7746 do
not respond to the I
during the default values upload for approximately 150 µs
(max 200 µs).
The reset command address word is 0xBF.
2
C bus, an explicit reset command is provided. This uses a
SEQUENCE
SEQUENCE
WRITE
READ
2
C bus commands (do not acknowledge)
S SLAVE ADDR A(S)
S SLAVE ADDR A(S)
S = START BIT
P = STOP BIT
SCLOCK
SDATA
LSB = 0
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
START ADDR R/W ACK SUBADDRESS ACK
S
SUB ADDR
SUB ADDR
1–7
Figure 25. Write and Read Sequences
8
A(S)
A(S) S SLAVE ADDR
Figure 24. Bus Data Transfer
9
Rev. 0| Page 13 of 28
DATA
1 –7
LSB = 1
8
A(S)
A(S) = NO-ACKNOWLEDGE BY SLAVE
A(M) = NO-ACKNOWLEDGE BY MASTER
GENERAL CALL
When a master issues a slave address consisting of seven 0s with
the eighth bit (R/W bit) set to 0, this is known as the general call
address. The general call address is for addressing every device
connected to the I
this address and read in the following data byte.
If the second byte is 0x06, the AD7745/AD7746 are reset,
completely uploading all default values. The AD7745/AD7746
do not respond to the I
during the default values upload for approximately 150 µs (max
200 µs).
The AD7745/AD7746 do not acknowledge any other general
call commands.
A(S)
9
1–7
DATA
DATA
8
DATA
ACK
A(M)
9
2
C bus. The AD7745/AD7746 acknowledge
STOP
2
P
C bus commands (do not acknowledge)
A(S)
P
DATA
AD7745/AD7746
A(M)
P