AD7666 Analog Devices, AD7666 Datasheet - Page 6

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AD7666

Manufacturer Part Number
AD7666
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7666

Resolution (bits)
16bit
# Chan
1
Sample Rate
500kSPS
Interface
Par,Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(Vref) p-p,2.5V p-p,Uni (Vref),Uni 2.5V
Adc Architecture
SAR
Pkg Type
CSP,QFP

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AD7666
Table 4. Serial Clock Timings in Master Read after Convert
DIVSCLK[1]
DIVSCLK[0]
SYNC to SCLK First Edge Delay Minimum
Internal SCLK Period Minimum
Internal SCLK Period Maximum
Internal SCLK HIGH Minimum
Internal SCLK LOW Minimum
SDOUT Valid Setup Time Minimum
SDOUT Valid Hold Time Minimum
SCLK Last Edge to SYNC Delay Minimum
BUSY HIGH Width Maximum
Rev. 0 | Page 6 of 28
Symbol
t
t
t
t
t
t
t
t
t
18
19
19
20
21
22
23
24
24
0
0
3
25
40
12
7
4
2
3
2
0
1
17
50
70
22
21
18
4
55
2.5
1
0
17
100
140
50
49
18
30
130
3.5
1
1
17
200
280
100
99
18
80
290
5.75
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs

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