AD7856 Analog Devices, AD7856 Datasheet - Page 18

• Manufacturer Part Number: AD7856
• Description: 5 V Single-Supply, 8-Channel, 14-Bit, 285 kSPS, Serial Sampling ADC
• Manufacturer: Analog Devices

Specifications of AD7856

• Resolution (bits): 14bit
• # Chan: 8
• Sample Rate: 285kSPS
• Interface: Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

AD7856
PERFORMANCE CURVES
The following performance curves apply to Mode 2 operation
only. If a conversion is initiated in software, then a slight degra-
dation in SNR can be expected when in Mode 2 operation. As
the sampling instant cannot be guaranteed internally, nonequi-
distant sampling will occur, resulting in a rise in the noise floor.
Initiating conversions in software is not recommended for Mode
1 operation.
Figure 18 shows a typical FFT plot for the AD7856 at 190 kHz
sample rate and 10 kHz input frequency.
Figure 19 shows the SNR vs. Frequency for 5 V supply and a
4.096 external reference (5 V reference is typically 1 dB better
performance).
Figure 20 shows the Power Supply Rejection Ratio versus Fre-
quency for the part. The Power Supply Rejection Ratio is de-
fined as the ratio of the power in ADC output at frequency f to
the power of a full-scale sine wave.
Pf = Power at frequency f in ADC output, Pfs = power of a
full-scale sine wave. Here a 100 mV peak-to-peak sine wave is
coupled onto the AV
unaltered.
–115
–15
–35
–55
–75
–95
79
78
77
76
75
0
0
10
10
Figure 19. SNR vs. Frequency
PSRR (dB) = 10 log (Pf/Pfs)
20
DD
20
Figure 18. FFT Plot
INPUT FREQUENCY – kHz
supply while the digital supply is left
30
50
FREQUENCY –kHz
40
80
50
4096 POINT FFT
F
F
SNR = 79.2dB
SAMPLE
IN
100
60
= 10.091 kHz
= 190.476 kHz
70
120
80
140
90
166
–18–
POWER-DOWN OPTIONS
The AD7856 provides flexible power management to allow the
user to achieve the best power performance for a given through-
put rate. The power management options are selected by
programming the power management bits, PMGT1 and PMGT0,
in the control register and by use of the SLEEP pin. Table VI
summarizes the power-down options that are available and how
they can be selected by using either software, hardware or a
combination of both. The AD7856 can be fully or partially
powered down. When fully powered down, all the on-chip cir-
cuitry is powered down and I
down is selected, then all the on-chip circuitry except the reference
is powered down and I
tial power-down does not give any significant improvement in
throughput with a power-down between conversions. This is
discussed in the next section–Power-Up Times. However, a
partial power-down does allow the on-chip reference to be used
externally even though the rest of the AD7856 circuitry is pow-
ered down. It also allows the AD7856 to be powered up faster
after a long power-down period when using the on-chip refer-
ence (See Power-Up Times–Using On-Chip Reference).
When using the SLEEP pin, the power management bits PMGT1
and PMGT0 should be set to zero (default status on power-up).
Bringing the SLEEP pin logic high ensures normal operation,
and the part does not power down at any stage. This may be
necessary if the part is being used at high throughput rates when
it is not possible to power down between conversions. If the user
wishes to power down between conversions at lower throughput
rates (i.e. <100 kSPS for the AD7856) to achieve better power
performances, then the SLEEP pin should be tied logic low.
If the power-down options are to be selected in software only,
then the SLEEP pin should be tied logic high. By setting the
power management bits PMGT1 and PMGT0 as shown in
Table VI, a Full Power-Down, Full Power-Up, Full Power-
Down Between Conversions, and a Partial Power-Down Be-
tween Conversions can be selected.
–72
–74
–76
–78
–80
–82
–84
–86
–88
–90
0.91
AV
100mV p-p SINEWAVE ON AV
REF
DD
13.4
Figure 20. PSRR vs. Frequency
IN
= DV
= 4.098 EXT REFERENCE
DD
25.7
DD
= 5.0V
INPUT FREQUENCY – kHz
is 400 A typ. The choice of full or par-
38.3
DD
50.3
is 1 A typ. If a partial power-
DD
63.5
74.8
87.4
100
REV. A