AD5421 Analog Devices, AD5421 Datasheet - Page 31

• Manufacturer Part Number: AD5421
• Description: 16-Bit, Serial Input, Loop-Powered, 4mA to 20mA DAC
• Manufacturer: Analog Devices

Specifications of AD5421

• Resolution (bits): 16bit
• Dac Settling Time: 50µs
• Max Pos Supply (v): +52V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: SPI

Data Sheet
APPLICATIONS INFORMATION
Figure 49 shows a typical connection diagram for the AD5421
configured in a HART capable smart transmitter. To reduce
power dissipation on the chip, a depletion mode MOSFET (T1),
such as a DN2540 or BSP129, can be connected between the
loop voltage and the AD5421, as shown in Figure 49.
If a low loop voltage is used, T1 does not need to be inserted,
and the loop voltage can connect directly to REG
In Figure 49, all interface signal lines are connected to the micro-
controller. To reduce the number of interface signal lines, the
LDAC signal can be connected to COM, and the SDO and FAULT
lines can be left unconnected. However, this configuration disables
the use of the fault alert features.
Under normal operating conditions, the voltage between COM
and LOOP− does not exceed 1.5 V, and the voltage at LOOP− is
negative with respect to COM. If it is possible that the voltage at
LOOP− may be forced positive with respect to COM, or if the
voltage difference between LOOP− and COM may be forced in
excess of 5 V, a 4.7 V low leakage Zener diode should be placed
between COM and the LOOP− pin, as shown in Figure 49, to
protect the AD5421 from potential damage.
SENSOR
ADuC7060
Σ-Δ ADC
24-BIT
MCU
Figure 49. AD5421 Application Diagram for HART Capable Smart Transmitter
EMC FILTER
OPTIONAL
0.1µF
IN
(see Figure 42).
4.7µF
0.1µF
0.1µF
TxD
RxD
RTS
CD
HART MODEM
0.1µF
HART_OUT
GND
V
IODV
REFOUT1 REFIN
RANGE0
RANGE1
ALARM_CURRENT_DIRECTION
R
SYNC
SCLK
SDIN
SDO
FAULT
LDAC
COM
REFOUT2
CC
HART_IN
INT
Rev. C | Page 31 of 36
/R
DD
EXT
0.1µF
DV
DD
10µF
SETS REGULATOR
AD5421
REG
2.5V
VOLTAGE
DETERMINING THE EXPECTED TOTAL ERROR
The AD5421 can be set up in a number of different configu-
rations, each of which achieves different levels of accuracy, as
described in Table 1 and Table 2. With the internal voltage
reference and internal R
of 0.157% of full-scale range can be expected for the C grade
device over the temperature range of −40°C to +105°C.
Other configurations specify an external voltage reference, an
external R
external R
assume that the external voltage reference and external R
resistor are ideal. Therefore, the errors associated with these
components must be added to the data sheet specifications to
determine the overall performance. The performance depends
on the specifications of these components.
OUT
OPTIONAL
MOSFET
DN2540
BSP129
47nF
SET
SET
REG
C
IN
LOOP–
DRIVE
resistor, or both an external voltage reference and
resistor. In these configurations, the specifications
V
R
R
IN
LOOP
EXT1
EXT2
COM
200kΩ
T1
168nF
OPTIONAL
RESISTOR
R1
SET
enabled, a maximum total error
V
Z
19MΩ
1MΩ
= 4.7V
AD5421
R
V
L
LOOP
SET