AD5762R Analog Devices, AD5762R Datasheet - Page 11

• Manufacturer Part Number: AD5762R
• Description: Complete Dual, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
• Manufacturer: Analog Devices

Specifications of AD5762R

• Resolution (bits): 16bit
• Dac Update Rate: 84.6kSPS
• Dac Settling Time: 8µs
• Max Pos Supply (v): +16.5V
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7, 8
9
10
11
12
13, 31
14
15, 30
16
17
18
19
20
21
Mnemonic
SYNC
SCLK
SDIN
SDO
CLR
LDAC
D0, D1
RSTOUT
RSTIN
DGND
DV
AV
PGND
AV
ISCC
NC
NC
VOUTB
AGNDB
AGNDA
DD
SS
CC
Description
Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data is
transferred in on the falling edge of SCLK.
Serial Clock Input. Data is clocked into the shift register on the falling edge of SCLK. This operates at clock speeds
of up to 30 MHz.
Serial Data Input. Data must be valid on the falling edge of SCLK.
Serial Data Output. Used to clock data from the serial register in daisy-chain or readback mode.
Negative Edge Triggered Input.
Load DAC. This logic input is used to update the DAC registers and, consequently, the analog outputs. When tied
permanently low, the addressed DAC register is updated on the rising edge of SYNC. If LDAC is held high during
the write cycle, the DAC input register is updated, but the output update is held off until the falling edge of LDAC.
In this mode, all analog outputs can be updated simultaneously on the falling edge of LDAC. The LDAC pin must
not be left unconnected.
Digital I/O Port. D0 and D1 form a digital I/O port. The user can set up these pins as inputs or outputs that are
configurable and readable over the serial interface. When configured as inputs, these pins have weak internal
pull-ups to DV
Reset Logic Output. This is the output from the on-chip voltage monitor used in the reset circuit. If desired, it can
be used to control other system components.
Reset Logic Input. This input allows external access to the internal reset logic. Applying a Logic 0 to this input
clamps the DAC outputs to 0 V. In normal operation, RSTIN should be tied to Logic 1. Register values remain
unchanged.
Digital Ground Pin.
Digital Supply Pin. Voltage ranges from 2.7 V to 5.25 V.
Positive Analog Supply Pins. Voltage ranges from 11.4 V to 16.5 V.
Ground Reference Point for Analog Circuitry.
Negative Analog Supply Pins. Voltage ranges from –11.4 V to –16.5 V.
This pin is used in association with an optional external resistor to AGND to program the short-circuit current of
the output amplifiers. Refer to the Design Features section for more information.
Do not connect to this pin.
Do not connect to this pin.
Analog Output Voltage of DAC B. Buffered output with a nominal full-scale output range of ±10 V. The output amplifier
is capable of directly driving a 10 kΩ, 200 pF load.
Ground Reference Pin for DAC B Output Amplifier.
Ground Reference Pin for DAC A Output Amplifier.
CC
. When programmed as outputs, D0 and D1 are referenced by DV
SYNC
SCLK
LDAC
NC = NO CONNECT
SDIN
SDO
CLR
D0
D1
1
2
3
4
5
6
7
8
1
32 31 30 29 28 27 26 25
9
Figure 6. Pin Configuration
Asserting this pin sets the DAC registers to 0x0000.
10 11 12 13 14 15 16
Rev. C | Page 11 of 32
PIN 1
(Not to Scale)
AD5762R
TOP VIEW
24
23
22
21
20
19
18
17
NC
NC
VOUTA
AGNDA
AGNDB
VOUTB
NC
NC
CC
and DGND.
AD5762R