CS6422-CSZ Cirrus Logic Inc, CS6422-CSZ Datasheet - Page 43

IC SPEAKERPHONE ENHANCED 20SOIC

CS6422-CSZ

Manufacturer Part Number
CS6422-CSZ
Description
IC SPEAKERPHONE ENHANCED 20SOIC
Manufacturer
Cirrus Logic Inc
Type
Audio Processorr
Datasheet

Specifications of CS6422-CSZ

Package / Case
20-SOIC
Applications
Speakerphones
Mounting Type
Surface Mount
Product
General Purpose Audio Amplifiers
Available Set Gain
34 dB
Thd Plus Noise
0.03 %
Operating Supply Voltage
5 V
Supply Current
10 mA, 50 mA
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Audio - Load Impedance
10 KOhms
Input Offset Voltage
2.12 V
Minimum Operating Temperature
0 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Rohs Compliant
Yes
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
SOIC
No. Of Pins
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
598-1200-5

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NI - Network Interface Input, Pin 17
Microcontroller Interface
RST - Active Low Reset Input, Pin 5
DRDY - Active Low Microcontroller Interface Data Ready Input, Pin 6
STROBE - Microcontroller Interface Clock Input, Pin 7
DATA - Microcontroller Interface Data Input, Pin 8
Clock
CLKI - Clock Oscillator Input, Pin 14
CLKO - Clock Oscillator Output, Pin 13
Power Supply
AVDD - Analog Supply, Pin 1
AGND - Analog Ground, Pin 2
DVDD - Digital Supply, Pin 16
DGND - Digital Ground, Pin 15
DS295F1
Input to the network side analog-to-digital converter (far-end input/receive input). This input expects a
single-pole RC anti-aliasing filter with a corner frequency of 8 kHz. Maximum signal level before clipping
at this point is 0.9 V
When RST is held low, the CS6422 is put into a low power mode with all functional blocks idle. When
RST goes high, the CS6422 is started in a known state.
DRDY is a low pulse used to gate valid input data into the Microcontroller Interface.
The rising edge of STROBE latches DATA into the Microcontroller Interface while DRDY is low.
DATA is latched into the Microcontroller Interface on the rising edge of STROBE.
A 20.480 MHz parallel-resonant crystal should be connected between CLKI and CLKO. Alternatively,
CLKI may be driven directly with an 20.480 MHz CMOS level clock.
A 20.480 MHz parallel-resonant crystal should be connected between CLKI and CLKO. CLKO must be
left floating if CLKI is driven directly with a CMOS level clock.
+5 Volt analog power supply.
Analog ground reference.
+5 Volt digital power supply.
Digital ground reference.
rms
(2.5 V
pp
), assuming default settings for RGain.
CS6422
CS6422
43
43

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