AD5429 Analog Devices, AD5429 Datasheet - Page 16

• Manufacturer Part Number: AD5429
• Description: Dual 8-Bit, High Bandwidth, Multiplying DAC with Serial Interface
• Manufacturer: Analog Devices

Specifications of AD5429

• Resolution (bits): 8bit
• Dac Update Rate: 2.47MSPS
• Dac Settling Time: 30ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

AD5429/AD5439/AD5449
Bipolar Operation
In some applications, it may be necessary to generate full
4-quadrant multiplying operation or a bipolar output swing.
This can easily be accomplished by using another external
amplifier and three external resistors, as shown in Figure 39.
When V
multiplication. When connected in bipolar mode, the output
voltage is
where:
D is the fractional representation of the digital word loaded to
the DAC.
Table 6 shows the relationship between digital code and the
expected output voltage for bipolar operation with the AD5429.
Table 6. Bipolar Code
Digital Input
1111 1111
1000 0000
0000 0001
0000 0000
D = 0 to 255 (AD5429)
n is the number of bits.
V
= 0 to 1023 (AD5439)
= 0 to 4095 (AD5449)
OUT
IN
is an ac signal, the circuit performs 4-quadrant
=
(
V
REF
×
D
2 /
V
REF
n
− 1
±10V
Analog Output (V)
+V
0
−V
−V
)
−
REF
REF
REF
V
REF
(255/256)
(255/256)
(256/256)
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS
3. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED
4. DAC B AND ADDITIONAL PINS OMITTED FOR CLARITY.
ADJUST R1 FOR V
R3 AND R4.
IF A1/A2 IS A HIGH SPEED AMPLIFIER.
R1
R1
MICROCONTROLLER
V
SYNC
REF
x
SCLK
AD5429/
AD5439/
AD5449
V
V
OUT
DD
DD
SDIN
= 0V WITH CODE 10000000 LOADED TO DAC.
R
FB
Figure 39. Bipolar Operation
GND
A
I
I
Rev. D | Page 16 of 28
20kΩ
OUT
OUT
R3
1A
2A
R2
C1
AGND
A1
Stability
In the I-to-V configuration, the I
node of the op amp must be connected as closely as possible, and
proper PCB layout techniques must be used. Because every code
change corresponds to a step function, gain peaking may occur
if the op amp has limited gain bandwidth product (GBP) and
there is excessive parasitic capacitance at the inverting node.
This parasitic capacitance introduces a pole into the open-loop
response, which can cause ringing or instability in the closed-
loop applications circuit.
As shown in Figure 38 and Figure 39, an optional compensation
capacitor, C1, can be added in parallel with R
Too small a value of C1 can produce ringing at the output,
whereas too large a value can adversely affect the settling time.
C1 should be found empirically, but 1 pF to 2 pF is generally
adequate for the compensation.
10kΩ
R4
20kΩ
A2
R5
V
OUT
= –V
REF
OUT
TO +V
of the DAC and the inverting
REF
FB
x for stability.