AD9786 Analog Devices, AD9786 Datasheet - Page 23

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AD9786

Manufacturer Part Number
AD9786
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD9786

Resolution (bits)
16bit
Dac Update Rate
500MSPS
Dac Settling Time
n/a
Max Pos Supply (v)
+3.5V
Single-supply
No
Dac Type
Current Out
Dac Input Format
Par

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Table 14.
DATA(02)
DATAFMT
ONEPORT
DCLKSTR
DCLKPOL
DCLKEXT
DCLKCRC
IQPOL
GRAYDIN
Table 15.
MODULATE(03)
CHANNEL
HILBERT
MODDUAL
SIDEBAND
MOD[1:0]
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
[3:2]
Direction
I
I
I
I
I
I
I
I
Direction
I
I
I
I
I
Default
0
0
0
0
0
0
0
0
Default
0
0
0
0
00
Description
0: Twos complement data format
1: Unsigned binary input data format
0: I and Q input data onto Port 1 and Port 2, respectively
1: I and Q input data interleaved onto Port 1
0: DATACLK pin, 12 mA drive strength
1: DATACLK pin, 24 mA drive strength
0: Input data latched on DATACLK/DACCLK rising edge (dependent on mode)
1: Input data latched on DATACLK/DACCLK falling edge (dependent on mode)
0: DATACLK pin inputs channel data rate or modulator synchronizer clock
1: DATACLK pin outputs channel data rate or modulator synchronizer clock
0: With DATACLK pin as input, DATACLK clock recovery off
1: With DATACLK pin as input, DATACLK clock recovery on
0: In one-port mode, IQSEL = 1 latches data into I channel, IQSEL = 0 latches data
into Q channel
1: In one-port mode, IQSEL = 0 latches data into I channel, IQSEL = 1 latches data
into Q channel
0: Gray decoder off
1: Gray decoder on
Description
MODDUAL
0x03[5]
0
0
1
1
1: With MODDUAL on, Hilbert transform on
0: Modulator uses a single channel
1: Modulator uses both I and Q channels
0: With MODDUAL on, upper sideband rejected
1: With MODDUAL on, lower sideband rejected
00: No modulation
01: f
10: f
11: f
S
S
S
/2 modulation
/4 modulation
/8 modulation
Rev. B | Page 23 of 56
CHANNEL
0x03[7]
0
1
0
1
I channel processing routed to DAC
Q channel processing routed to DAC
Modulator real output routed to DAC
Modulator imaginary output routed to DAC
AD9786

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