AD5383 Analog Devices, AD5383 Datasheet - Page 3

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AD5383

Manufacturer Part Number
AD5383
Description
32-Channel 12-Bit 3 V/5 V Single-Supply Voltage-Output DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD5383

Resolution (bits)
12bit
Dac Update Rate
167kSPS
Dac Settling Time
6µs
Max Pos Supply (v)
+5.5V
Single-supply
No
Dac Type
Voltage Out
Dac Input Format
Par,Ser,SPI

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GENERAL DESCRIPTION
The AD5383 is a complete, single-supply, 32-channel, 12-bit
DAC available in a 100-lead LQFP package. All 32 channels
have an on-chip output amplifier with rail-to-rail operation.
The AD5383 includes a programmable internal 1.25 V/2.5 V,
10 ppm/°C reference; an on-chip channel monitor function that
multiplexes the analog outputs to a common MON_OUT pin
for external monitoring; and an output amplifier boost mode
that allows optimization of the amplifier slew rate. The AD5383
features
Table 1. Other H
Model
AD5380BST-5
AD5380BST-3
AD5384BBC-5
AD5384BBC-3
AD5381BST-5
AD5381BST-3
AD5382BST-5
AD5382BST-3
AD5390BST-5
AD5390BCP-5
AD5390BST-3
AD5390BCP-3
AD5391BST-5
AD5391BCP-5
AD5391BST-3
AD5391BCP-3
AD5392BST-5
AD5392BCP-5
AD5392BST-3
AD5392BCP-3
Table 2. 40-Ch
Model
AD5379ABC
Double-buffered parallel interface with a 20 ns WR pulse
width.
SPI-/QSPI-/MICROWIRE-/DSP-compatible serial
interface with interface speeds in excess of 30 MHz.
I
transfer rate.
2
C-compatible interface that supports a 400 kHz data
annel, Bipol
Resolut
14 Bits
Resolut
14 Bits
14 Bits
14 Bits
14 Bits
12 Bits
12 Bits
14 Bits
14 Bits
14 Bits
14 Bits
14 Bits
14 Bits
12 Bits
12 Bits
12 Bits
12 Bits
14 Bits
14 Bits
14 Bits
14 Bits
igh Channe
ion
ion
ar
l
Analog Supplies
±11.4 V to ±16.5 V
Voltage Output D C
Cou t, Low V
AV
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.7 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.7 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
4.5 V to 5.5 V
2.7 V to 3.6 V
2.7 V to 3.6 V
DD
n
Range
olt
age, Single-Supply AC Products in Portfo
Output Channels
40
40
40
40
40
40
32
32
16
16
16
16
16
16
16
16
8
8
8
8
A
Output Channe
40
Rev. B | Page 3 of 40
ls
D
Line
±4
±4
±4
±4
±1
±1
±4
±4
±3
±3
±4
±4
±1
±1
±1
±1
±3
±3
±4
±4
Linearity Error (LSB)
±3
An input register followed by a DAC register provides double
buffering, allowing the DAC outputs to be updated indepen-
dently or simultaneously using the LDAC input.
Each channel has a programmable gain and offset adjust
register that allows the user to fully calibrate any DAC channel.
With boost off, power consumption is typically 0.25 mA/channel.
Table 1 and Table 2 show additional products featuring high
channel count, low voltage, single-supply operation, and bipolar
voltage output operation.
arity Error (LSB)
li
o
Package Descri
100-Lead LQFP
100-Lead LQFP
100-Lead CSPBGA
100-Lead CSPBGA
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
100-Lead LQFP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
52-Lead LQFP
64-Lead LFCSP
Package
108-Lead CSPBGA
ption
Package Option
Package Option
BC-108
ST-100
ST-100
BC-100
BC-100
ST-100
ST-100
ST-100
ST-100
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
ST-52
CP-64
AD5383

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