AD7804 Analog Devices, AD7804 Datasheet - Page 2

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AD7804

Manufacturer Part Number
AD7804
Description
+3.3 V to +5 V Quad/Octal 10-Bit DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7804

Resolution (bits)
10bit
Dac Update Rate
667kSPS
Dac Settling Time
1.5µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
Ser

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Reference = Internal Reference; C
AD7804/AD7805/AD7808/AD7809
AD7804/AD7805–SPECIFICATIONS
Parameter
STATIC PERFORMANCE
OUTPUT CHARACTERISTICS
DAC REFERENCE INPUTS
DIGITAL INPUTS
REFERENCE OUTPUT
POWER REQUIREMENTS
NOTES
1
2
3
Specifications subject to change without notice.
Temperature range is – 40 C to +85 C.
Can be minimized using the Sub DAC.
V
BIAS
MAIN DAC
Monotonicity
SUB DAC
Output Voltage Range
Voltage Output Settling Time to 10 Bits
Slew Rate
Digital-to-Analog Glitch Impulse
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DC Output Impedance
Power Supply Rejection Ratio
REF IN Range
REF IN Input Leakage
Input High Voltage, V
Input High Voltage, V
Input Low Voltage, V
Input Low Voltage, V
Input Leakage Current
Input Capacitance
Input Coding
REF OUT Output Voltage
REF OUT Error
REF OUT Temperature Coefficient
REF OUT Output Impedance
V
I
Power Dissipation
DD
DD
Resolution
Relative Accuracy
Gain Error
Bias Offset Error
Zero-Scale Error
Minimum Load Resistance
Resolution
Differential Nonlinearity
Normal Mode
System Standby (SSTBY) Mode
Power-Down (PD) Mode
Normal Mode
System Standby (SSTBY) Mode
Power-Down (PD) Mode
is the center of the output voltage swing and can be V
(AI
(AV
@ +25 C
T
@ +25 C
T
MIN
MIN
DD
DD
–T
–T
Plus DI
and DV
MAX
MAX
DD
3
2
DD
)
IL
IL
IH
IH
3
)
@ V
@ V
@ V
@ V
DD
DD
DD
DD
= 5 V
= 3.3 V
= 5 V
= 3.3 V
L
= 100 pF; R
B Grade
10
–80/+40
–V
9
2
8
V
V
4
2.5
1
0.5
0.5
2
0.002
1.0 to V
2.4
2.1
0.8
0.6
10
Twos Comp/Binary
1.23
–100
5
3/5.5
12
250
0.8
1.5
66
1.38
4.4
8.25
3
3
0.125
0.5
BIAS
0.2
1
10
8
BIAS
16
BIAS
/16 to 31/16 V
L
15/16
DD
/ 40
= 2 k
1
/2
DD
/2, Internal Reference or REFIN as determined by MX1 and MX0 in the channel control register.
V
BIAS
to GND. Sub DAC at Midscale. All specifications T
BIAS
–V
C Grade
10
–80/+40
10
2
8
V
V
4
2.5
1
0.5
0.5
2
0.002
1.0 to V
2.4
2.1
0.8
0.6
10
Twos Comp/Binary
1.23
–100
5
3/5.5
12
250
0.8
1.5
66
1.38
4.4
8.25
A max
3
3
0.125
0.5
BIAS
BIAS
0.2
1
8
16
BIAS
–2–
/16 to 31/16 V
15/16
DD
/ 40
1
(AV
/2
DD
V
and DV
BIAS
BIAS
DD
= 3.3 V
Units
Bits
LSB max
% FSR max
mV max
mV max
Bits
k min
Bits
LSB typ
LSB max
V
V
V/ s typ
nV-s typ
nV-s typ
nV-s typ
LSB typ
%/% typ
V min to V max
V min
V min
V max
V max
pF max
V nom
% max
ppm/ C typ
k nom
V min to V max
mA max
mW max
mW max
s max
A max
A
A max
A max
W max
W max
typ
10% to 5 V
MIN
Comments
DAC Code = 0.5 Full Scale
DAC Code = 000H for Offset Binary
and 200H for Twos Complement Coding
Refers to an LSB of the Main DAC
Twos Complement Coding
Offset Binary Coding
Typically 1.5 s
1 LSB Change Around the Major Carry
Typically 1 nA
Excluding Load Currents
V
V
V
Excluding Power Dissipated in Load
V
IH
IH
IH
to T
DD
= V
= V
= V
MAX
DD
DD
DD
10%
10%; AGND = DGND = 0 V;
unless otherwise noted.)
, V
, V
, V
IL
IL
IL
= DGND
= DGND
= DGND
REV. A

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