AD7568 Analog Devices, AD7568 Datasheet

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AD7568

Manufacturer Part Number
AD7568
Description
Octal 12-Bit CMOS DAC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7568

Resolution (bits)
12bit
Dac Update Rate
2MSPS
Dac Settling Time
500ns
Max Pos Supply (v)
+5.25V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Ser

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REV. C
a
GENERAL DESCRIPTION
The AD7568 contains eight 12-bit DACs in one monolithic de-
vice. The DACs are standard current output with separate V
I
The AD7568 is a serial input device. Data is loaded using
FSIN, CLKIN and SDIN. One address pin, A0, sets up a de-
vice address, and this feature may be used to simplify device
loading in a multi-DAC environment.
All DACs can be simultaneously updated using the asynchro-
nous LDAC input and they can be cleared by asserting the
asynchronous CLR input.
The AD7568 is housed in a space-saving 44-pin plastic quad
flatpack and 44-lead PLCC.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
OUT1
FEATURES
Eight 12-Bit DACs in One Package
4-Quadrant Multiplication
Separate References
Single +5 V Supply
Low Power: 1 mW
Versatile Serial Interface
Simultaneous Update Capability
Reset Function
44-Pin PQFP and PLCC
APPLICATIONS
Process Control
Automatic Test Equipment
General Purpose Instrumentation
, I
OUT2
I
I
I
I
V
OUT2
V
R
OUT1
R
V
OUT1
OUT2
R
REF
REF
REF
FB
FB
FB
NC
G
G
H
H
G
G
F
F
F
F
and R
10
11
1
2
3
4
5
6
7
8
9
FB
Plastic Quad Flatpack
terminals.
PIN 1 IDENTIFIER
AD7568 PQFP
NC = NO CONNECT
Not to Scale
(Not to Scale)
TOP VIEW
AD7568
TOP VIEW
33
32
31
30
29
28
27
26
25
24
23
NC
V
R
I
I
V
R
I
I
V
R
OUT2
OUT2
OUT1
OUT1
REF
REF
REF
FB
FB
FB
PIN CONFIGURATIONS
C
B
A
C
A
B
C
B
C
B
REF
,
CLKIN
SDIN
FSIN
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
I
I
I
I
V
V
AD7568
V
OUT1
OUT2
OUT1
OUT2
R
R
R
REF
REF
REF
FB
FB
FB
NC
A0
G
G
G
G
H
H
CONTROL LOGIC
F
F
F
F
FUNCTIONAL BLOCK DIAGRAM
INPUT SHIFT
10
11
12
13
14
15
16
17
REGISTER
7
8
9
V
DD
+
Plastic Leaded Chip Carrier
LATCH A
LATCH B
LATCH C
LATCH D
LATCH E
LATCH G
LATCH F
LATCH H
18
6
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
SDOUT
AGND
19
5
20
12
4
©2012 Analog Devices, Inc. All rights reserved.
DGND
21
12
12
12
12
12
12
12
12
3
AD7568 PLCC
NC = NO CONNECT
(Not to Scale)
LDAC
22
TOP VIEW
2
LATCH
V
LATCH
LATCH
LATCH
LATCH
LATCH
LATCH
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
DAC G
LATCH
DAC H
Octal 12-Bit DAC
REF
23
1
D
CLR
44
24
V
REF
43
25
V
REF
C
12
12
12
12
12
12
12
12
42
26
V
E
REF
41
27
V
REF
B
AD7568
40
28
V
F
DAC D
DAC E
REF
DAC A
DAC B
DAC C
DAC F
DAC G
DAC H
V
REF
A
LC
39
38
37
36
35
34
33
32
31
30
29
www.analog.com
G
R
NC
V
I
I
V
R
I
I
V
R
R
OUT1
OUT2
OUT1
OUT2
FB
V
REF
REF
FB
REF
FB
FB
REF
A
2
C
B
A
C
B
A
C
C
B
B
H
MOS
I
I
I
R
I
I
R
I
I
I
R
I
I
I
I
R
I
I
R
R
I
I
R
OUT1
OUT2
OUT2
OUT2
OUT2
OUT1
OUT1
OUT1
OUT1
OUT2
OUT1
OUT2
OUT1
OUT2
OUT1
OUT2
FB
FB
FB
FB
FB
FB
FB
B
C
E
H
D
F
G
A
A
C
B
B
C
D
D
E
E
F
F
G
G
H
H

Related parts for AD7568

AD7568 Summary of contents

Page 1

... OUT1 OUT2 FB The AD7568 is a serial input device. Data is loaded using FSIN, CLKIN and SDIN. One address pin, A0, sets up a de- vice address, and this feature may be used to simplify device loading in a multi-DAC environment. All DACs can be simultaneously updated using the asynchro- nous LDAC input and they can be cleared by asserting the asynchronous CLR input ...

Page 2

... POWER REQUIREMENTS V Range 4.75/5.25 DD Power Supply Sensitivity Gain/ V – 300 DD 3.5 AC PERFORMANCE CHARACTERISTICS Parameter AD7568B DYNAMIC PERFORMANCE Output Voltage Settling Time 500 Digital to Analog Glitch Impulse 40 Multiplying Feedthrough Error –66 Output Capacitance 60 30 Channel-to-Channel Isolation –76 Digital Crosstalk 40 Digital Feedthrough ...

Page 3

... DB15 DB0 t 8 DB15 t 9 Figure 1. Timing Diagram +2.1V –3– AD7568 unless otherwise noted) MIN MAX Description CLKIN Cycle Time CLKIN High Time CLKIN Low Time FSIN Setup Time Data Setup Time Data Hold Time FSIN Hold Time SDOUT Valid After CLKIN Falling Edge ...

Page 4

... AD7568 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted A Parameter V to DGND DGND OUT1 I to DGND OUT2 Digital Input Voltage to DGND DGND RFB REF Input Current to Any Pin Except Supplies 1 Operating Temperature Range Commercial Plastic (B Versions) Storage Temperature Range Lead Temperature (Soldering, 10 sec) Power Dissipation (Any Package) to 75° ...

Page 5

... REV. C Output Voltage Settling Time This is the amount of time it takes for the output to settle to a specified level for a full-scale input change. For the AD7568 specified with the AD843 as the output op amp. Digital to Analog Glitch Impulse This is the amount of charge injected into the analog output when the inputs change state ...

Page 6

... AD7568 –Typical Performance Curves 5 +25 C 4.5 A 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 DIGITAL INPUT – Volts Figure 3. Supply Current vs. Logic Input Voltage 1 + 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 2.0 4.0 6.0 8.0 10.0 V – Volts REF Figure 6. Integral Nonlinearity Error vs. V REF 5V 200ns 100 DIGITAL INPUTS +10V REF OP AMP = AD713 ...

Page 7

... When an output amplifier is connected in the standard configu- ration of Figure 15, the output voltage is given by –D V • OUT REF where D is the fractional representation of the digital word loaded to the DAC. Thus, in the AD7568, D can be set from 0 to 4095/4096 REF ...

Page 8

... BIPOLAR OPERATION (4-Quadrant Multiplication) Figure 16 shows the standard connection diagram for bipolar operation of any one of the DACs in the AD7568. The coding is offset binary as shown in Table IV. When V the circuit performs 4-quadrant multiplication. To maintain the gain error specifications, resistors R3, R4 and R5 should be ra- tio matched to 0 ...

Page 9

... Instead of several fixed resistors, the circuit uses the 0 DAC equivalent resistances as circuit elements. Thus Figure 19 is controlled by the 12-bit digital word loaded to DAC A of the AD7568. This is also the case with R2, R3 and R4. The fixed resistor R5 is the feedback resistor, R DAC Equivalent Resistance, R must not ...

Page 10

... TXD. The 80C51 transmits its serial data in 8-bit bytes with only eight falling clock edges occurring in the transmit cycle. To load data to the AD7568, P3.3 is left low af- ter the first eight bits are transferred, and a second byte of data is then transferred serially to the AD7568. When the second se- rial transfer is complete, the P3 ...

Page 11

... DAC outputs by bringing the XF output flag low. Multiple DAC Systems If there are only two AD7568s in a system, there is a simple way of programming each. This is shown in Figure 24. If the user wishes to program one of the DACs in the first AD7568, then DB3 of the serial bit stream should be set correspond to the state of the A0 pin on that device ...

Page 12

... Data is transmitted at the MOSI pin of the 68HC11. It flows through the input shift registers of the AD7568s and finally appears at the SDOUT pin of DAC N. So, the readback routine can be invoked any time after the first four words have been transmitted (the four input shift registers in the ...

Page 13

... AD7568BP −40°C to +85°C AD7568BP-REEL −40°C to +85°C AD7568BPZ −40°C to +85°C AD7568BPZ-REEL −40°C to +85°C AD7568BSZ −40°C to +85°C AD7568BSZ-REEL −40°C to +85° RoHS Compliant Part REV. C 0.180 (4.57) 0.165 (4.19) 0.056 (1.42) 0.020 (0.51) 0.042 (1.07) MIN ...

Page 14

... AD7568 REVISION HISTORY 2/12—Rev Rev. C Changes to CLR Description, Pin Description Table ................... 4 Updated Outline Dimensions ........................................................ 13 Changes to Ordering Guide ........................................................... 13 Added Revision History Section ................................................... 14 ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10541-0-2/12(C) – 14 – ...

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