STA32813TR STMicroelectronics, STA32813TR Datasheet - Page 17

• Manufacturer Part Number: STA32813TR
• Description: IC DAS 2.1CH HI EFF POWERSO36
• Manufacturer: STMicroelectronics
• Series: DDX™r
• Type: Audio Ampr

Specifications of STA32813TR

• Mounting Type: Surface Mount
• Package / Case: 36-PowerSOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Other names: 497-8876-2

STA328
5.3
5.4
Write operation
Following the START condition the master sends a device select code with the RW bit set
to 0. The STA328 acknowledges this and then the master writes the internal address byte.
After receiving the internal byte address the STA328 again responds with an
acknowledgement.
Figure 13. I
Byte write
In the byte write mode the master sends one data byte. This is acknowledged by the
STA328. The master then terminates the transfer by generating a STOP condition.
Multi-byte write
The multi-byte write modes can start from any internal address. Sequential data byte writes
will be written to sequential addresses within the STA328.
The master generating a STOP condition terminates the transfer.
Read operation
Figure 14. I
Current address byte read
Following the START condition the master sends a device select code with the RW bit set to
1. The STA328 acknowledges this and then responds by sending one byte of data. The
master then terminates the transfer by generating a STOP condition.
SEQUENTIAL
SEQUENTIAL
CURRENT
CURRENT
ADDRESS
ADDRESS
RANDOM
RANDOM
READ
READ
READ
READ
MULTIBYTE
WRITE
WRITE
BYTE
START
START
START
START
2
2
C write procedure
C read procedure
START
START
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
DEV-ADDR
HIGH
RW=
RW
RW
RW
ACK
ACK
ACK
ACK
SUB-ADDR
SUB-ADDR
DATA
DATA
RW
RW
ACK
ACK
NO ACK
ACK
ACK
ACK
START
START
SUB-ADDR
SUB-ADDR
STOP
DATA
DEV-ADDR
DEV-ADDR
ACK
ACK
RW
RW
ACK
ACK
ACK
DATA IN
DATA IN
DATA
DATA
DATA
NO ACK
NO ACK
ACK
ACK
ACK
STOP
STOP
STOP
DATA
I
2
ACK
C bus specification
DATA IN
DATA
ACK
NO ACK
STOP
STOP
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