CS3308-CQZ Cirrus Logic Inc, CS3308-CQZ Datasheet - Page 35

• Manufacturer Part Number: CS3308-CQZ
• Description: IC ANLG VOL CTRL 8CH DGTL 48LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Controllerr

Specifications of CS3308-CQZ

• Package / Case: 48-LQFP
• Applications: High End Audio
• Mounting Type: Surface Mount
• Product: General Purpose Audio Amplifiers
• Output Power: 362 mW
• Available Set Gain: 22 dB
• Thd Plus Noise: - 112 dB
• Operating Supply Voltage: 3.5 V / 5.25 V
• Supply Current: 36 mA
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio Load Resistance: 2 KOhms
• Input Offset Voltage: 0.75 V
• Input Signal Type: Single
• Minimum Operating Temperature: - 10 C
• Output Signal Type: Analog
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 3.1 V
• Output Type: 8-Channel Audio
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1778 - EVALUATION BOARD FOR CS5376598-1496 - BOARD EVAL FOR CS3308 VOL CTRL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1598

DS702F1
7.5.2
7.6
7.6.1
7.7
7.7.1
Reserved
PDN8
7
7
Channel Power - Address 0Dh
Master Power - Address 0Eh
Zero-Crossing Mode (Bits 1:0)
Default = 01
Function:
Power Down Channel X (Bit 0 - 7)
Default = 0
Function:
Power Down All (Bit 0)
Default = 1
Function:
These bits control the Zero-Crossing detection mode as shown in
ing Modes” section on page 22
Each respective channel will enter a low-power state whenever this bit is set. A channel’s power-down
bit must be cleared for normal operation to occur.
The device will enter a low-power state whenever this bit is set. The power-down bit is set by default
and must be cleared before normal operation can occur. The control registers remain accessible, and
their contents are retained while the device is in power-down.
ZCMode[1:0]
Reserved
PDN7
6
6
00
01
10
11
Volume changes take effect immediately.
Volume changes take effect on a signal zero-crossing. If a zero-crossing is not detected
before the period specified by the TimeOut[2:0] bits has elapsed, the volume change will be
implemented immediately when the time-out period elapses. If the volume setting is
changed again before the original volume change has been implemented, the original
change will be discarded, the time-out period will be reset, and the new volume setting will
take effect when a zero-crossing is detected or the time-out period elapses.
Volume changes take effect on a signal zero-crossing. If a zero-crossing is not detected
before the period specified by the TimeOut[2:0] bits has elapsed, the volume change will be
implemented immediately when the time-out period elapses. If the volume setting is
changed again before the original volume change has been implemented, the original vol-
ume change will be implemented immediately upon reception of the new volume change
command, the time-out period will be reset, and the new volume setting will take effect when
a zero-crossing is detected or the time-out period elapses.
Reserved
Reserved
PDN6
5
5
Reserved
for more information.
Table 9. Zero-Crossing Mode Settings
PDN5
4
4
Reserved
Zero-Crossing Mode
PDN4
3
3
Reserved
PDN3
2
2
Table
9. Refer to the
Reserved
PDN2
1
1
“Zero-Cross-
PDN_ALL
CS3308
PDN1
0
0
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