CS8420-DSZ Cirrus Logic Inc, CS8420-DSZ Datasheet - Page 35
![IC CONV S/R DGTL AUDIO 28-SOIC](/photos/7/3/70396/cs8420-dsz_sml.jpg)
CS8420-DSZ
Manufacturer Part Number
CS8420-DSZ
Description
IC CONV S/R DGTL AUDIO 28-SOIC
Manufacturer
Cirrus Logic Inc
Type
Sample Rate Converterr
Datasheet
1.CS8420-CSZ.pdf
(94 pages)
Specifications of CS8420-DSZ
Applications
Digital Audio
Mounting Type
Surface Mount
Package / Case
28-SOIC
Audio Control Type
Sample Rate Converter
Control Interface
3 Wire, Serial
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
-40°C To +85°C
Audio Ic Case Style
SOIC
No. Of Pins
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1729
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS8420-DSZ
Manufacturer:
CIRRUS
Quantity:
20 000
DS245F4
10.3
TRUNC
HOLD[1:0]
RMCKF
MMR
MMT
MMTCS
MMTLR
TRUNC
7
Miscellaneous Control 2 (02h)
HOLD1
0 - Data to the SRC is not truncated (default)
1 - Data to the SRC is set according to the AUX field in the incoming data stream
The HOLD bits determine how the received audio sample is affected when a receiver
error occurs.
00 - Hold the last valid audio sample (default)
01 - Replace the current audio sample with 00 (mute)
10 - Do not change the received audio sample
11 - Reserved
0 - RMCK is equal to 256 * Fsi (default)
1 - RMCK is equal to 128 * Fsi
0 - Interpret A and B subframes as two independent channels (normal stereo operation, default)
1 - Interpret A and B subframes as consecutive samples of one channel of data.This data is
duplicated to both left and right parallel outputs of the AES receiver block. The input sample
rate (Fsi) is doubled compared to MMR=0
0 - Outputs left channel input into A subframe and right channel input into B subframe (normal
stereo operation, default).
1 - Output either left or right channel inputs into consecutive subframe outputs (mono mode, left
or right is determined by MMTLR bit)
0 - Use channel A CS data for the A sub-frame slot and use channel B CS data for the B sub-
frame slot (default)
1 - Use the same CS data for both the A and B sub-frame output slots. If MMTLR = 0, use the
left channel CS data. If MMTLR = 1, use the right channel CS data.
Channel Selection for AES Transmitter mono mode
0 - Use left channel input data for consecutive sub-frame outputs (default)
1 - Use right channel input data for consecutive sub-frame outputs
Determines whether the word length is set according to the incoming Channel Status data
Select recovered master clock output pin frequency.
Select AES3 receiver mono or stereo operation
Select AES3 transmitter mono or stereo operation
Select A or B channel status data to transmit in mono mode
6
HOLD0
5
RMCKF
4
MMR
3
MMT
2
MMTCS
1
CS8420
MMTLR
0
35