ADP120 Analog Devices, ADP120 Datasheet - Page 13

• Manufacturer Part Number: ADP120
• Description: 100 mA, Low Quiescent Current, CMOS Linear Regulator
• Manufacturer: Analog Devices

Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over temper-
ature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP120, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
UNDERVOLTAGE LOCKOUT
The ADP120 has an internal undervoltage lockout circuit that
disables all inputs and the output when the input voltage is less
than approximately 2.2 V. This ensures that the inputs and the
output of the ADP120 behave in a predictable manner during
power-up.
ENABLE FEATURE
The ADP120 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. Figure 31 shows a rising
voltage on EN crossing the active threshold, and VOUT turns on.
When a falling voltage on EN crosses the inactive threshold,
VOUT turns off.
As shown in Figure 31, the EN pin has hysteresis built-in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the VIN
voltage; therefore, these thresholds vary with changing input
voltage. Figure 32 shows typical EN active/inactive thresholds
when the input voltage varies from 2.3 V to 5.5 V.
Figure 31. Typical EN Pin Operation
(40ms/DIV)
EN
V
V
V
C
I
LOAD
OUT
IN
OUT
IN
= 5V
= C
= 1.8V
= 100mA
OUT
= 1µF
Rev. B | Page 13 of 20
The ADP120 utilizes an internal soft start to limit the inrush
current when the output is enabled. The start-up time for the
1.8 V option is approximately 120 μs from the time the EN
active threshold is crossed to when the output reaches 90% of
its final value. The start-up time is somewhat dependent on
the output voltage setting and increases slightly as the output
voltage increases.
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50
6
5
4
3
2
1
0
0
Figure 32. Typical EN Pin Thresholds vs. Input Voltage
20
40
Figure 33. Typical Start-Up Time
EN ACTIVE
60
80
TIME (µs)
V
IN
100
(V)
EN INACTIVE
120
140
3.3V
1.8V
1.2V
EN
160
180
ADP120
2
00