ADP151 Analog Devices, ADP151 Datasheet - Page 13
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ADP151
Manufacturer Part Number
ADP151
Description
Ultra Low Noise, 200 mA CMOS Linear Regulator
Manufacturer
Analog Devices
Datasheet
1.ADP151.pdf
(24 pages)
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ENABLE FEATURE
The ADP151 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. As shown in Figure 30,
when a rising voltage on EN crosses the active threshold, VOUT
turns on. When a falling voltage on EN crosses the inactive
threshold, VOUT turns off.
As shown in Figure 30, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds are derived from the VIN
voltage. Therefore, these thresholds vary with changing input
voltage. Figure 31 shows typical EN active/inactive thresholds
when the input voltage varies from 2.2 V to 5.5 V.
The ADP151 uses an internal soft start to limit the inrush current
when the output is enabled. The start-up time for the 3.3 V
option is approximately 160 μs from the time the EN active
threshold is crossed to when the output reaches 90% of its final
value. As shown in Figure 32, the start-up time is dependent on
the output voltage setting.
1200
1000
800
600
400
200
3.0
2.5
2.0
1.5
1.0
0.5
0
0
2.0
0
Figure 31. Typical EN Pin Thresholds vs. Input Voltage
Figure 30. ADP151 Typical EN Pin Operation
2.5
0.5
3.0
ENABLE VOLTAGE
INPUT VOLTAGE
1.0
3.5
V
V
EN
EN
4.0
FALL
RISE
1.5
4.5
2.0
5.0
2.5
5.5
Rev. D | Page 13 of 24
ADJUSTABLE OUTPUT VOLTAGE OPERATION
The unique architecture of the ADP151 makes an adjustable
version difficult to implement in silicon. However, it is possible
to create an adjustable regulator at the expense of increasing the
quiescent current of the regulator circuit.
The ADP151, and similar LDOs, are designed to regulate the
output voltage, V
to the GND pin. If the GND pin is at a potential other than 0 V
(for example, at V
V
create an adjustable ADP151 circuit that retains most of the
desirable characteristics of the ADP151.
The circuit shown in Figure 33 is an example of an adjustable
LDO using the ADP151. A stable V
passing a known current through R2. The current through R2 is
determined by the voltage across R1. Because the voltage across
R1 is set by the voltage between VOUT and GND, the current
passing through R2 is fixed, and V
To minimize the effect variation of the ADP151 ground current
(I
also best to size the current passing through R2 to at least 20×
greater than the maximum expected ground current.
To create a 4 V LDO circuit, start with the 3.3 V version of the
ADP151 to minimize the value of R2. Because V
V
R1 is, therefore, 3.3 V/7 mA or 471 Ω. A 470 Ω standard value
introduces less than 1% error. Capacitor C3 is necessary to stabilize
the LDO; a value of 1 μF is adequate.
GND
OFFSET
OFFSET
) with load, it is best to keep R1 as small as possible. It is
. By taking advantage of this behavior, it is possible to
3.5
3.0
2.5
2.0
1.5
1.0
0.5
must be 0.7 V, and the current through R2 must be 7 mA.
0
0
Figure 33. Adjustable LDO Using the ADP151
50
C1
V
V
IN
OFFSET
Figure 32. Typical Start-Up Behavior
OUT
OFFSET
100
R2
, appearing at the VOUT pin with respect
), the ADP151 output voltage is V
150
1
2
3
C3
VIN
GND
EN
V
200
OUT
TIME (µs)
U1
= V
VOUT
OFFSET
250
NC
LDO
OFFSET
× (1 + R1/R2)
5
4
R1
is stable.
300
voltage is created by
V
350
OUT
C2
OUT
ENABLE
3.3V
2.8V
1.1V
400
ADP151
is 4 V,
450
OUT
+