ADP151 Analog Devices, ADP151 Datasheet - Page 21
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ADP151
Manufacturer Part Number
ADP151
Description
Ultra Low Noise, 200 mA CMOS Linear Regulator
Manufacturer
Analog Devices
Datasheet
1.ADP151.pdf
(24 pages)
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Price
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OUTLINE DIMENSIONS
IDENTIFIER
BALL A1
PIN 1 INDEX
SEATING
(BALL SIDE DOWN)
PLANE
* 0.90 MAX
0.70 MIN
AREA
0.60
0.55
0.50
TOP VIEW
0.800
0.760 SQ
0.720
0.10 MAX
1.60 BSC
Figure 63. 5-Lead Thin Small Outline Transistor Package [TSOT]
Figure 65. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD]
* COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
0.35
0.30
0.25
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
Figure 64. 4-Ball Wafer Level Chip Scale Package [WLCSP]
TOP VIEW
BSC SQ
2.00 mm × 2.00 mm Body, Ultra Thin, Dual Lead
2.00
5
1
2.90 BSC
0.430
0.400
0.370
0.50
0.30
BSC
1.90
2
Dimensions show in millimeters
Dimensions show in millimeters
Dimensions show in millimeters
0.230
0.200
0.170
4
3
Rev. D | Page 21 of 24
0.95 BSC
* 1.00 MAX
2.80 BSC
0.20 REF
(CB-4-3)
(CP-6-3)
0.425
0.350
0 .275
(UJ-5)
0.05 MAX
0.02 NOM
SEATING
PLANE
0.660
0.600
0.540
0.050 NOM
COPLANARITY
0.40
BALL PITCH
0.20
0.08
SEATING
PLANE
4
3
BOTTOM VIEW
1.70
1.60
1.50
EXPOSED
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
PAD
8°
4°
0°
0.280
0.260
0.240
1
6
0.65 BSC
0.60
0.45
0.30
1.10
1.00
0.90
BOTTOM VIEW
(BALL SIDE UP)
2
1
A
B
ADP151