E-TDA7590 STMicroelectronics, E-TDA7590 Datasheet - Page 21

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E-TDA7590

Manufacturer Part Number
E-TDA7590
Description
IC DSP SPEECH/AUDIO 144-TQFP
Manufacturer
STMicroelectronics
Type
Signalr
Datasheet

Specifications of E-TDA7590

Applications
Speech Recognition
Mounting Type
Surface Mount
Package / Case
144-TQFP Exposed Pad, 144-eTQFP, 144-HTQFP, 144-VQFP
Device Core Size
24b
Format
Fixed Point
Clock Freq (max)
120MHz
Mips
120
Device Input Clock Speed
120MHz
Ram Size
384KB
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (min)
1.62/3V
Operating Supply Voltage (max)
1.98/3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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TDA7590
7.7
7.8
7.9
Timers and watchdog block
The timers and watchdog block consists of a common 21-bit prescaler and three
independent and identical general-purpose 24-bit timer/event counters, each with its own
register set.
Each timer has the following capabilities:
When TIO is configured as an
PLL
The PLL generates the following clocks:
CODEC cell
The main features of the CODEC cell are listed below:
The analog interface is in the form of differential signals for each channel. The interface on
the digital side has the form of an SAI interface and can interface directly to an SAI channel
and then to the DSP core.
DCLK can be supplied either by the internal PLL or by external, to allow synchronization
with external anal digital sources.
Uses internal or external clocking.
Interrupts the Mozart after a specified number of events (clocks).
Signals an external device after counting internal events.
Triggers DMA transfers after a specified number of events (clocks) occurs.
Connects to the external world through designated pins TIO[0-2] for timers 0-2.
Input: timer functions as an external event counter. Timer measures external pulse
width/signal period.
Output: timer functions as a:
DCLK: DSP core clock
DACLK: ADC and DAC clock
LRCLK: left/right clock for the SAI and the CODEC
SCLK: shift serial clock for the SAI and the CODEC
20 bits stereo DAC, and 18 bits ADC
I
Oversampling ratio: 512
Sampling rates of 8 kHz to 48 kHz
2
S format
Timer
Watchdog timer
Pulse-width modulator.
DSP peripherals
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