EC103D1 NXP Semiconductors, EC103D1 Datasheet - Page 2

Planar passivated ultra sensitive gate Silicon Controlled Rectifier in a SOT54 (T0-92) plastic package

EC103D1

Manufacturer Part Number
EC103D1
Description
Planar passivated ultra sensitive gate Silicon Controlled Rectifier in a SOT54 (T0-92) plastic package
Manufacturer
NXP Semiconductors
Datasheet

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3. Ordering information
Table 2.
4. Limiting values
Table 3.
In accordance with the Absolute Maximum Rating System (IEC 60134).
EC103D1_2
Product data sheet
Type number
EC103D1
Symbol
V
V
V
V
I
I
I
I
dI
I
V
P
P
T
T
T(AV)
T(RMS)
TSM
2
GM
stg
j
DRM
RRM
DSM
RSM
t
RGM
GM
G(AV)
T
/dt
Ordering information
Limiting values
Parameter
repetitive peak off-state voltage
repetitive peak reverse voltage
non-repetitive peak off-state voltage
non-repetitive peak reverse voltage
average on-state current
RMS on-state current
non-repetitive peak on-state current
I
rate of rise of on-state current
peak gate current
peak reverse gate voltage
peak gate power
average gate power
storage temperature
junction temperature
2
t for fusing
Package
Name
TO-92
Description
plastic single-ended leaded (through hole) package; 3 leads
Rev. 02 — 31 July 2008
Conditions
half sine wave; T
see
all conduction angles;
see
half sine wave; T
surge; see
t
I
dI
over any 20 ms period
p
TM
G
t = 10 ms
t = 8.3 ms
= 10 ms
/dt = 0.1 A/ s
= 2 A; I
Figure 1
Figure 4
G
Figure 2
= 10 mA;
and
lead
j
5
= 25 C prior to
and
92 C;
3
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Thyristor, sensitive gate
40
EC103D1
© NXP B.V. 2008. All rights reserved.
Max
400
400
450
450
0.5
0.8
8
9
0.32
50
1
5
2
0.1
+150
125
Version
SOT54
Unit
V
V
V
V
A
A
A
A
A
A/ s
A
V
W
W
C
C
2
s
2 of 12

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