LPC1774FBD208 NXP Semiconductors, LPC1774FBD208 Datasheet - Page 60
LPC1774FBD208
Manufacturer Part Number
LPC1774FBD208
Description
The LPC1774 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1774FBD144.pdf
(120 pages)
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NXP Semiconductors
LPC178X_7X
Objective data sheet
7.32.1 Features
7.33.1 Crystal oscillators
7.32 Event monitor/recorder
7.33 Clocking and power control
The event monitor/recorder allows recording of tampering events in sealed product
enclosures. Sensors report any attempt to open the enclosure, or to tamper with the
device in any other way. The event monitor/recorder stores records of such events when
the device is powered only by the backup battery.
The LPC178x/7x include four independent oscillators. These are the main oscillator, the
IRC oscillator, the watchdog oscillator, and the RTC oscillator.
Following reset, the LPC178x/7x will operate from the Internal RC oscillator until switched
by software. This allows systems to operate without any external crystal and the boot
loader code to operate at a known frequency.
See
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Dedicated power supply pin can be connected to a battery or to the main 3.3 V.
Periodic interrupts can be generated from increments of any field of the time registers.
Backup registers (20 bytes) powered by VBAT.
RTC power supply is isolated from the rest of the chip.
Supports three digital event inputs in the VBAT power domain.
An event is defined as a level change at the digital event inputs.
For each event channel, two timestamps mark the first and the last occurrence of an
event. Each channel also has a dedicated counter tracking the total number of events.
Timestamp values are taken from the RTC.
Runs in VBAT power domain, independent of system power supply. The
event/recorder/monitor can therefore operate in Deep power-down mode.
Very low power consumption.
Interrupt available if system is running.
A qualified event can be used as a wake-up trigger.
State of event interrupts accessible by software through GPIO.
Figure 7
for an overview of the LPC178x/7x clock generation.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 27 December 2011
32-bit ARM Cortex-M3 microcontroller
LPC178x/7x
© NXP B.V. 2011. All rights reserved.
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