LPC3130_3131 NXP Semiconductors, LPC3130_3131 Datasheet - Page 25
LPC3130_3131
Manufacturer Part Number
LPC3130_3131
Description
The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC3130_3131.pdf
(68 pages)
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NXP Semiconductors
LPC3130_3131_1
Preliminary data sheet
Fig 6. CGU block diagram
EXTERNAL
CRYSTAL
I2SRX_BCK1
I2SRX_BCK0
I2SRX_WS0
I2SRX_WS1
The LPC3130/3131 has 11 clock domains (n = 11). The number of fractional dividers m depends on the clock domain.
clock resources
6.16 Watchdog Timer (WDT)
OSCILLATOR
The watchdog timer can be used to generate a system reset if there is a CPU/software
crash. In addition, the watchdog timer can be used as an ordinary timer.
how the watchdog timer module is connected in the system.
This module has the following features:
•
•
•
•
•
Based on the input of the Watchdog timer (see also
generate a system-wide reset in the case of a system stall.
In the event of a software or hardware failure, generates a chip-wide reset request
when its programmed time-out period has expired (output m1).
Watchdog counter can be reset by a periodical software trigger.
After a reset, a register will indicate whether a reset has occurred because of a
watchdog generated reset.
Watchdog timer can also be used as a normal timer (output m0).
Rev. 1 — 9 February 2009
I
2
SYSTEM
S/AUDIO
PLL
PLL
Low-cost, low-power ARM926EJ-S microcontrollers
SWITCHBOX
CLOCK DOMAIN 0
CLOCK DOMAIN n
BASE
subdomain clocks
Section
FRACTIONAL
FRACTIONAL
DIVIDER m
LPC3130/3131
DIVIDER 0
6.16), the CGU can
© NXP B.V. 2009. All rights reserved.
Figure 7
clock outputs
002aae085
to modules
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