P87LPC769 NXP Semiconductors, P87LPC769 Datasheet - Page 11

• Manufacturer Part Number: P87LPC769
• Description: The P87LPC769 is a 20-pin single-chip microcontroller designed forlow pin count applications demanding high-integration, low costsolutions over a wide range of performance requirements
• Manufacturer: NXP Semiconductors

* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
Philips Semiconductors
NOTES:
2002 Mar 12
P1M1#
P1M2#
P2M1#
P2M2#
PCON
PSW*
PT0AD#
SCON*
SBUF
SADDR#
SADEN#
SP
TCON*
TH0
TH1
TL0
TL1
TMOD
WDCON#
WDRST#
Low power, low price, low pin count (20 pin)
microcontroller with 4 kB OTP 8-bit A/D, and DAC
Name
purposes in future derivatives. The reset value shown in the table for these bits is 0.
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
0000b for all other reset causes if the watchdog is disabled.
Port 1 output mode 1
Port 1 output mode 2
Port 2 output mode 1
Port 2 output mode 2
Power control register
Program status word
Port 0 digital input disable
Serial port control
Serial port data buffer
register
Serial port address register
Serial port address enable
Stack pointer
Timer 0 and 1 control
Timer 0 high byte
Timer 1 high byte
Timer 0 low byte
Timer 1 low byte
Timer 0 and 1 mode
Watchdog control register
Watchdog reset register
Description
Address
SFR
D0h
8Ch
8Dh
91h
92h
A4h
A5h
87h
F6h
98h
99h
A9h
B9h
81h
88h
8Ah
8Bh
89h
A7h
A6h
SMOD1 SMOD0
(P1M1.7)
(P1M2.7)
GATE
SM0
MSB
P2S
TF1
CY
D7
9F
8F
–
–
(P1M1.6)
(P1M2.6)
SM1
P1S
TR1
C/T
D6
AC
9E
8E
–
–
8
WDOVF
BOF
SM2
P0S
TF0
M1
D5
9D
8D
F0
–
–
–
Bit Functions and Addresses
(P1M1.4)
(P1M2.4)
ENCLK
WDRUN
POF
REN
RS1
TR0
M0
D4
9C
8C
–
WDCLK
T1OE
GATE
GF1
RS0
TB8
IE1
D3
9B
8B
–
–
–
WDS2
T0OE
GF0
RB8
C/T
OV
IT1
D2
9A
8A
–
–
–
(P1M1.1)
(P1M2.1)
(P2M1.1)
(P2M2.1)
WDS1
IE0
PD
M1
D1
F1
99
89
TI
P87LPC769
(P1M1.0)
(P1M2.0)
(P2M1.0)
(P2M2.0)
WDS0
Preliminary data
LSB
IDL
IT0
M0
D0
98
RI
88
P
00h
00h
00h
00h
Note 3
00h
00h
00h
xxh
00h
00h
07h
00h
00h
00h
00h
00h
00h
Note 4
xxh
Reset
Value
1
1
1