P89LPC938 NXP Semiconductors, P89LPC938 Datasheet - Page 37

• Manufacturer Part Number: P89LPC938
• Description: The P89LPC938 is a single-chip microcontroller, available in low cost packages, based ona high performance processor architecture that executes instructions in two to four clocks,six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 14051
Product data sheet
Fig 15. SPI block diagram.
SPI STATUS REGISTER
BY 4, 16, 64, 128
CPU clock
DIVIDER
SELECT
SPI CONTROL
7.22 SPI
The P89LPC938 provides another high-speed serial communication interface—the SPI
interface. SPI is a full-duplex, high-speed, synchronous communication bus with two
operation modes: Master mode and Slave mode. Up to 3 Mbit/s can be supported in either
Master or Slave mode. It has a Transfer Completion Flag and Write Collision Flag
Protection.
The SPI interface has four pins: SPICLK, MOSI, MISO and SS:
Typical connections are shown in
•
•
SPICLK, MOSI and MISO are typically tied together between two or more SPI
devices. Data flows from master to slave on MOSI (Master Out Slave In) pin and flows
from slave to master on MISO (Master In Slave Out) pin. The SPICLK signal is output
in the master mode and is input in the slave mode. If the SPI system is disabled, i.e.,
SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port functions.
SS is the optional slave select pin. In a typical configuration, an SPI master asserts
one of its port pins to select one SPI device as the current slave. An SPI slave device
uses its SS pin to determine whether it is selected.
interrupt
request
SPI clock (master)
SPI
MSTR
SPEN
Rev. 01 — 25 February 2005
internal
data
bus
SPI CONTROL REGISTER
8-BIT SHIFT REGISTER
READ DATA BUFFER
CLOCK LOGIC
Figure 16
clock
8-bit microcontroller with 10-bit A/D converter
through
Figure
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
18.
P89LPC938
M
M
M
S
S
S
CONTROL
LOGIC
PIN
002aaa900
MISO
P2.3
MOSI
P2.2
SPICLK
P2.5
SS
P2.4
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