BUK9MJJ-65PLL NXP Semiconductors, BUK9MJJ-65PLL Datasheet - Page 8
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BUK9MJJ-65PLL
Manufacturer Part Number
BUK9MJJ-65PLL
Description
Dual N-channel enhancement mode field-effect power transistor in SO20
Manufacturer
NXP Semiconductors
Datasheet
1.BUK9MJJ-65PLL.pdf
(16 pages)
NXP Semiconductors
Table 6.
BUK9MJJ-65PLL
Product data sheet
Symbol
FET1 and FET2 dynamic characteristics
Q
Q
Q
C
C
C
t
t
t
t
L
L
FET1 and FET2 source-drain diode
V
t
Q
d(on)
r
d(off)
f
rr
Fig 9.
D
S
SD
iss
oss
rss
G(tot)
GS
GD
r
R
(mΩ)
DSon
60
45
30
15
0
of gate-source voltage; typical values, FET1
and FET2
Drain-source on-state resistance as a function
0
Characteristics
Parameter
total gate charge
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer
capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain
inductance
internal source
inductance
source-drain voltage
reverse recovery time
recovered charge
2
4
…continued
6
Conditions
I
see
V
T
V
R
from pin to center of die
from source lead to source bonding
pad
I
see
I
V
All information provided in this document is subject to legal disclaimers.
D
S
S
8
j
GS
DS
GS
G(ext)
V
001aal612
= 25 °C; see
= 10 A; V
= 10 A; dI
= 10 A; V
GS
Figure 19
Figure 21
= 30 V; R
= 0 V; V
= -10 V; V
(V)
= 10 Ω
10
Rev. 03 — 15 July 2010
DS
GS
S
DS
/dt = -100 A/µs;
L
DS
= 52 V; V
= 0 V; T
Figure 20
= 3 Ω; V
= 25 V; f = 1 MHz;
= 30 V
Fig 10. Forward transconductance as a function of
j
= 25 °C;
GS
GS
(S)
g
= 5 V;
= 5 V;
fs
250
200
150
100
drain current; typical values, FET1 and FET2
0
Dual TrenchPLUS FET Logic Level FET
15
BUK9MJJ-65PLL
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
30
Typ
30.8
6.5
13.5
2660
322
123
32
59
120
79
0.9
2
0.85
50
0.125
45
© NXP B.V. 2010. All rights reserved.
I
001aal613
D
-
-
(A)
Max
-
-
-
-
-
-
-
-
-
-
1.2
-
-
60
Unit
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
nH
V
ns
nC
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