PSMN0R9-25YLC NXP Semiconductors, PSMN0R9-25YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN0R9-25YLC

Manufacturer Part Number
PSMN0R9-25YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PSMN0R9-25YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
(m)
R
DS on
5
4
3
2
1
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
Q
25
GS1
2.4
I
Q
D
N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology
GS
Q
GS2
50
Q
G(tot)
Q
GD
4.5
75
V
GS
All information provided in this document is subject to legal disclaimers.
2.6
003a a f 526
003aaa508
I
(V) = 2.8
D
(A)
3.5
3.0
10
100
Rev. 2 — 4 July 2011
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
(V)
GS
a
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
30
0
PSMN0R9-25YLC
5V
V
GS
=4.5V
60
60
12V
V
DS
120
90
= 20V
© NXP B.V. 2011. All rights reserved.
10V
003a a f 527
003a a f 533
Q
T
G
j
( C)
(nC)
180
120
9 of 15

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