LT1715IMS#TRPBF Linear Technology, LT1715IMS#TRPBF Datasheet
LT1715IMS#TRPBF
Specifications of LT1715IMS#TRPBF
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LT1715IMS#TRPBF Summary of contents
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... LT1720/LT1721. For a single comparator with similar propagation delay, see the LT1719. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. UltraFast is a trademark of Linear Technology Corporation. Line Receiver Response to 100MHz Clock, 50MHz Data Both with 25mV ...
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... LEAD FREE FINISH TAPE AND REEL LT1715CMS#PBF LT1715CMS#TRPBF LT1715IMS#PBF LT1715IMS#TRPBF LT1715HMS#PBF LT1715HMS#TRPBF Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: For more information on tape and reel specifi ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are at T unless otherwise specifi ed. SYMBOL PARAMETER V Input Offset Voltage OS V Input Hysteresis Voltage HYST V /ΔT Input Offset Voltage Drift OS I Input Bias Current B I Input ...
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LT1715 ELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT1715C ...
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TYPICAL PERFORMANCE CHARACTERISTICS Input Current vs Differential Input Voltage 25° – –1 –2 –3 –4 –5 –6 –7 –5 –4 –3 –2 –1 0 ...
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LT1715 TYPICAL PERFORMANCE CHARACTERISTICS Maximum Toggle Rate vs Input Amplitude 180 T = 25° 160 GND EE 140 C = 10pF LOAD 120 100 ...
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TEST CIRCUITS LT1715 1715fa 7 ...
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LT1715 TEST CIRCUITS PULSE 0V IN –3V 50Ω 8 Response Time Test Circuit 0V –100mV 25Ω 25Ω 50k 0.1μF 130Ω 50Ω V1* 2N3866 1N5711 400Ω 750Ω *V1 = –1000 • (OVERDRIVE + V NOTE: RISING EDGE TEST SHOWN. FOR FALLING ...
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APPLICATIONS INFORMATION Power Supply Confi gurations The LT1715 has separate supply pins for the input and output stages that allow fl exible operation, accommodating separate voltage ranges for the analog input and the output logic. Of course, a single 3V/5V ...
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LT1715 APPLICATIONS INFORMATION When both input signals are above the positive common mode limit, the input stage will get debiased and the output polarity will be random. However, the internal hysteresis will hold the output to a valid logic level. ...
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APPLICATIONS INFORMATION The ground trace from Pin 6 runs under the device up to the bypass capacitor, shielding the inputs from the outputs. Note the use of a common via for the LT1715 and the bypass capacitors, which minimizes interference ...
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LT1715 APPLICATIONS INFORMATION Unused Comparators If a comparator is unused, its output should be left fl oa- tingto minimize load current. The unused inputs can be tied off to the rails and power consumption can be further minimized if the ...
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APPLICATIONS INFORMATION V REF R2´ 1/2 LT1715 – Figure 7. Model for Additional Hysteresis Calculations The second step is to recalculate R2 to set the same av- erage threshold as before. The average threshold before ...
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LT1715 APPLICATIONS INFORMATION Of course, if the V of the LT1715 is the same as the EE ECL negative supply, the GND pin can be tied well and +V grounded. Then the output stage has the same ...
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APPLICATIONS INFORMATION ECL, and particularly PECL, is valuable technology for high speed system design, but it must be used with care. With less than a volt of swing, the noise margins need to be evaluated carefully. Note that there is ...
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LT1715 APPLICATIONS INFORMATION The bias conditions and signal swings in the output stage are designed to turn their respective output transistors off faster than on. This helps minimize the surge of current from +V to ground that occurs at transitions, ...
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APPLICATIONS INFORMATION The gain and hysteresis stage of the LT1715 is simple, short and high speed to help prevent parasitic oscillations while adding minimum dispersion. This internal “self-latch” can be usefully exploited in many applications because it occurs early in ...
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LT1715 SIMPLIFIED SCHEMATIC 18 1715fa ...
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... LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...
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... Dual/Quad Comparator Similar to the LT1715 www.linear.com ● sine wave at 10MHz will P-P at 10MHz, the LT1715 delay starts to decrease 25° – 10MHz 632mV 2V 6.32V P-P P-P P-P – INPUT AMPLITUDE (dBm) 1715 F12b LT 1008 REV A • PRINTED IN USA © LINEAR TECHNOLOGY CORPORATION 2001 1715fa ...