EP4S100G5H40I3N Altera Corporation, EP4S100G5H40I3N Datasheet - Page 4

• Manufacturer Part Number: EP4S100G5H40I3N
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera Corporation
• Series: STRATIX® IV GTr

Specifications of EP4S100G5H40I3N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 28033024
• Number Of I /o: 654
• Number Of Gates: -
• Voltage - Supply: 0.92 V ~ 0.98 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-BBGA Exposed Pad
• Lead Free Status: Lead free
• Rohs Status: RoHS Compliant

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Stratix IV Device Handbook Volume 1
Stratix IV E Device
Stratix IV E devices provide an excellent solution for applications that do not require
high-speed CDR-based transceivers, but are logic, user I/O, or memory intensive.
Figure 1–2
Figure 1–2. Stratix IV E Chip View
Note to
(1) Resource counts vary with device selection, package selection, or both.
Figure
shows a high-level Stratix IV E chip view.
1–2:
and Soft-CDR
and Soft-CDR
High-Speed
High-Speed
Purpose
LVDS I/O
with DPA
Purpose
LVDS I/O
with DPA
General
I/O and
General
I/O and
High-Speed LVDS I/O with DPA
PLL
PLL
PLL
PLL
General Purpose I/O and
and Soft-CDR
General Purpose
General Purpose
I/O and Memory
I/O and Memory
Interface
Interface
(Note 1)
(Logic Elements, DSP,
Embedded Memory,
Clock Networks)
FPGA Fabric
PLL
PLL
PLL
PLL
General Purpose I/O and
150 Mbps-1.6 Gbps
LVDS interface with DPA and Soft-CDR
Chapter 1: Overview for the Stratix IV Device Family
General Purpose
General Purpose
I/O and Memory
I/O and Memory
Interface
Interface
and Soft-CDR
and Soft-CDR
High-Speed
High-Speed
June 2011 Altera Corporation
LVDS I/O
LVDS I/O
Purpose
with DPA
Purpose
with DPA
General
I/O and
General
I/O and
PLL
PLL
PLL
PLL
Feature Summary