STM32F101V8 STMicroelectronics, STM32F101V8 Datasheet - Page 61
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STM32F101V8
Manufacturer Part Number
STM32F101V8
Description
Mainstream Access line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 36 MHZ CPU
Manufacturer
STMicroelectronics
Datasheet
1.STM32F101C8.pdf
(87 pages)
Specifications of STM32F101V8
Peripherals Supported
timers, ADC, SPIs, I2Cs and USARTs
Conversion Range
0 to 3.6 V
Systick Timer
24-bit downcounter
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STM32F101x8, STM32F101xB
Table 39.
1. Guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
t
w(SCLL)
t
su(SDA)
t
t
t
su(STO)
t
su(STA)
h(SDA)
4 MHz to achieve fast mode I
maximum I2C fast mode clock.
period of SCL signal.
undefined region of the falling edge of SCL.
h(STA)
r(SDA)
r(SCL)
f(SDA)
f(SCL)
PCLK1
C
b
must be higher than 2 MHz to achieve standard mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition setup
time
Stop condition setup time
Stop to Start condition time (bus
free)
Capacitive load for each bus line
I
2
C characteristics
Parameter
2
C frequencies. It must be a multiple of 10 MHz to reach the 400 kHz
Doc ID 13586 Rev 14
Standard mode I
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
(3)
2
C frequencies. It must be higher than
1000
Max
300
400
2
C
(1)
Electrical characteristics
Fast mode I
20+0.1C
Min
100
0
1.3
0.6
0.6
0.6
1.3
0.6
(4)
b
2
900
Max
C
300
300
400
(1)(2)
(3)
Unit
61/87
pF
µs
ns
µs
µs
µs