STM32W108HB STMicroelectronics, STM32W108HB Datasheet - Page 182

• Manufacturer Part Number: STM32W108HB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108HB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

Analog-to-digital converter
11.3.4
Table 115. ADC DMA configuration register (ADC_DMACFG)
11.3.5
Table 116. ADC DMA status register (ADC_DMASTAT)
182/232
31
15
31
15
30
14
30
14
ADC DMA configuration register (ADC_DMACFG)
Address offset: 0xD010
Reset value:
ADC DMA status register (ADC_DMASTAT)
Address offset: 0xD014
Reset value:
Bit 4
Bit 1
Bit 0
Bit 1
Bit 0
29
13
29
13
ADC_DMARST: Write 1 to reset the ADC DMA. This bit auto-clears.
ADC_DMAAUTOWRAP: Selects DMA mode.
0: Linear mode, the DMA stops when the buffer is full.
1: Auto-wrap mode, the DMA output wraps back to the start when the buffer is full.
ADC_DMALOAD: Loads the DMA buffer.
Write 1 to start DMA (writing 0 has no effect). Cleared when DMA starts or is reset.
ADC_DMAOVF: DMA overflow: occurs when an ADC result is ready and the DMA is not active.
Cleared by DMA reset.
ADC_DMAACT: DMA status: reads 1 if DMA is active.
28
12
28
12
27
11
27
11
0x0000 0000
0x0000 0000
Reserved
26
10
26
10
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
25
25
9
9
Reserved
Doc ID 16252 Rev 13
24
24
8
8
Reserved
Reserved
23
23
7
7
22
22
6
6
21
21
5
5
DMAR
ADC_
ST
20
20
w
4
4
19
19
3
3
Reserved
18
18
2
2
MAOVF
UTOW
ADC_D
DMAA
ADC_
RAP
17
17
rw
1
1
r
MAACT
ADC_D
ADC_
DMAL
OAD
16
rw
16
0
0
r