STM8L152C8 STMicroelectronics, STM8L152C8 Datasheet - Page 39
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STM8L152C8
Manufacturer Part Number
STM8L152C8
Description
STM8L-Ultra Low Power-8 bits Microcontrollers
Manufacturer
STMicroelectronics
Datasheet
1.STM8L151R6.pdf
(126 pages)
Specifications of STM8L152C8
Operating Power Supply
1.65 to 3.6 V (without BOR), 1.8 to 3.6 V (with BOR)
Temp. Range
−40 to 85, 105 or 125 °C
5 Low Power Modes
Wait, Low power run (5.9 μA), Low power wait (3 μA), Active-halt with full RTC (1.4 μA), Halt (400 nA)
Dynamic Power Consumption
200 μA/MHz+330 μA
Ultra Low Leakage Per I/0
50 nA
Max Freq
16 MHz, 16 CISC MIPS peak
Lcd
8x40 or 4x44 w/ step-up converter
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Manufacturer
Quantity
Price
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STM
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520
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Manufacturer:
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ST
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Manufacturer:
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STM8L15xx8, STM8L15xR6
Table 8.
0x00 501C
0x00 501D
0x00 502C
0x00 500F
0x00 501A
0x00 501B
0x00 501E
0x00 501F
0x00 502A
0x00 502B
0x00 5010
0x00 5011
0x00 5012
0x00 5013
0x00 5014
0x00 5015
0x00 5016
0x00 5017
0x00 5018
0x00 5019
0x00 5020
0x00 5021
0x00 5022
0x00 5023
0x00 5024
0x00 5025
0x00 5026
0x00 5027
0x00 5028
0x00 5029
Address
I/O port hardware register map (continued)
Port G
Port D
Port E
Port H
Block
Port F
Port I
Register label
PG_ODR
PD_ODR
PD_DDR
PE_ODR
PG_DDR
PH_ODR
PH_DDR
PE_DDR
PF_ODR
PF_DDR
PG_CR1
PG_CR2
PD_CR1
PD_CR2
PE_CR1
PE_CR2
PH_CR1
PH_CR2
PF_CR1
PF_CR2
PD_IDR
PE_IDR
PG_IDR
PH_IDR
PI_ODR
PI_DDR
PF_IDR
PI_CR1
PI_CR2
PI_IDR
Doc ID 17943 Rev 4
Port D data output latch register
Port H data output latch register
Port E data output latch register
Port F data output latch register
Port F data output latch register
Port I data output latch register
Port G input pin value register
Port D input pin value register
Port E input pin value register
Port H input pin value register
Port F input pin value register
Port D data direction register
Port G data direction register
Port H data direction register
Port E data direction register
Port F data direction register
Port I input pin value register
Port I data direction register
Port D control register 1
Port D control register 2
Port E control register 1
Port E control register 2
Port G control register 1
Port G control register 2
Port H control register 1
Port H control register 2
Port F control register 1
Port F control register 2
Port I control register 1
Port I control register 2
Register name
Memory and register map
status
Reset
0xXX
0xXX
0xXX
0xXX
0xXX
0xXX
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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