ST72325J4 STMicroelectronics, ST72325J4 Datasheet - Page 117
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ST72325J4
Manufacturer Part Number
ST72325J4
Description
8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet
1.ST72325K4.pdf
(197 pages)
Specifications of ST72325J4
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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SERIAL COMMUNICATIONS INTERFACE (Cont’d)
EXTENDED RECEIVE PRESCALER DIVISION
REGISTER (SCIERPR)
Read/Write
Reset Value: 0000 0000 (00h)
Allows setting of the Extended Prescaler rate divi-
sion factor for the receive circuit.
Bits 7:0 = ERPR[7:0] 8-bit Extended Receive
Prescaler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see
binary factor set in the SCIERPR register (in the
range 1 to 255).
The extended baud rate generator is not used af-
ter a reset.
Table 23. Baudrate Selection
ERPR
Symbol
7
7
f
f
Tx
Rx
ERPR
6
Communication frequency 8 MHz
ERPR
5
Parameter
ERPR
4
Figure
ERPR
3
3.) is divided by the
ERPR
2
f
CPU
ERPR
1
Accuracy vs
Standard
~0.16%
~0.79%
ERPR
0
0
Conditions
EXTENDED TRANSMIT PRESCALER DIVISION
REGISTER (SCIETPR)
Read/Write
Reset Value:0000 0000 (00h)
Allows setting of the External Prescaler rate divi-
sion factor for the transmit circuit.
Bits 7:0 = ETPR[7:0] 8-bit Extended Transmit
Prescaler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see
binary factor set in the SCIETPR register (in the
range 1 to 255).
The extended baud rate generator is not used af-
ter a reset.
Conventional Mode
TR (or RR)=128, PR=13
TR (or RR)= 32, PR=13
TR (or RR)= 16, PR=13
TR (or RR)= 8, PR=13
TR (or RR)= 4, PR=13
TR (or RR)= 16, PR= 3
TR (or RR)= 2, PR=13
TR (or RR)= 1, PR=13
Extended Mode
ETPR (or ERPR) = 35,
TR (or RR)= 1, PR=1
ETPR
7
7
ETPR
Prescaler
6
ETPR
5
ETPR
4
Figure
Standard
ETPR
3
10400
19200
38400
14400 ~14285.71
1200
2400
4800
9600
300
3.) is divided by the
ETPR
2
~10416.67
~19230.77
~38461.54
~1201.92
~2403.84
~4807.69
~9615.38
Baud
~300.48
ST72325xx
Rate
ETPR
1
117/197
ETPR
Unit
Hz
0
0
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