ST72325J4 STMicroelectronics, ST72325J4 Datasheet - Page 167
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ST72325J4
Manufacturer Part Number
ST72325J4
Description
8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet
1.ST72325K4.pdf
(197 pages)
Specifications of ST72325J4
Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
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COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
Figure 91. SPI Slave Timing Diagram with CPHA=1
Figure 92. SPI Master Timing Diagram
Notes:
1. Measurement points are done at CMOS levels: 0.3xV
2. When no communication is on-going the data output line of the SPI (MOSI in master mode, MISO in slave mode) has
its alternate function capability released. In this case, the pin status depends of the I/O port configuration.
MISO
MOSI
MISO
MOSI
SS
CPHA=1
CPOL=0
CPHA=1
CPOL=1
SS
OUTPUT
INPUT
CPHA = 0
CPOL = 0
CPHA = 0
CPOL = 1
CPHA = 1
CPOL = 0
CPHA = 1
CPOL = 1
INPUT
OUTPUT
INPUT
INPUT
see
note 2
See note 2
t
a(SO)
t
su(SS)
HZ
t
t
t
su(MI)
w(SCKH)
w(SCKL)
t
su(SI)
MSB OUT
MSB IN
MSB OUT
t
MSB IN
h(MI)
1)
t
h(SI)
t
c(SCK)
t
c(SCK)
t
t
t
v(MO)
w(SCKH)
w(SCKL)
t
v(SO)
DD
and 0.7xV
BIT6 OUT
1)
BIT6 IN
BIT6 OUT
DD
.
BIT1 IN
t
h(MO)
t
h(SO)
t
t
r(SCK)
f(SCK)
t
t
r(SCK)
f(SCK)
LSB OUT
LSB IN
LSB OUT
LSB IN
t
h(SS)
ST72325xx
See note 2
t
dis(SO)
167/197
note 2
see
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