ST72321J7-Auto STMicroelectronics, ST72321J7-Auto Datasheet - Page 208

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ST72321J7-Auto

Manufacturer Part Number
ST72321J7-Auto
Description
8-bit MCU for automotive with 48 Kbyte Flash, 10-bit ADC, timers, SPI, SCI and I2C interfaces
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72321J7-Auto

Hdflash Endurance
100 cycles, data retention 20 years
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt, Wait and Slow
Electrical characteristics
Figure 90. RESET pin protection when LVD is enabled
Note:
208/243
EXTERNAL
RESET
1
2
3
4
Required
The reset network protects the device against parasitic resets.
The output of the external reset circuit must have an open-drain output to drive the ST7
reset pad. Otherwise the device can be damaged when the ST7 generates an internal reset
(LVD or watchdog).
Whether the reset source is internal or external, the user must ensure that the level on the
RESET pin can go below the V
Otherwise the reset will not be taken into account internally.
Because the reset circuit is designed to allow the internal RESET to be output in the RESET
pin, the user must ensure that the current sunk on the RESET pin is less than the absolute
maximum value specified for I
When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A
10nF pull-down capacitor is required to filter noise on the reset line.
In case a capacitive power supply is used, it is recommended to connect a 1M
resistor to the RESET pin to discharge any residual voltage induced by the capacitive effect
of the power supply (this will add 5µA to the power consumption of the MCU).
Tips when using the LVD:
A. Check that all recommendations related to reset circuit have been applied (see notes
above).
B. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU).
Refer to AN1709 and AN2017. If this cannot be done, it is recommended to put a 100nF +
1M
C. The capacitors connected on the RESET pin and also the power supply are key to avoid
any start-up marginality. In most cases, steps A and B above are sufficient for a robust
solution. Otherwise, replace 10nF pull-down on the RESET pin with a 5µF to 20µF
capacitor.
pull-down on the RESET pin.
0.01µF
1M
Optional
(note 3)
INJ(RESET)
Doc ID 13829 Rev 1
IL
maximum level specified in
V
DD
R
ON
in
Filter
Section 19.2.2 on page
GENERATOR
PULSE
Section 19.9.1 on page
187.
ST72321xx-Auto
INTERNAL
RESET
WATCHDOG
LVD RESET
pull-down
ST72XXX
207.

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