ST7LIT15BY0 STMicroelectronics, ST7LIT15BY0 Datasheet - Page 34
ST7LIT15BY0
Manufacturer Part Number
ST7LIT15BY0
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet
1.ST7LIT10BF0.pdf
(159 pages)
Specifications of ST7LIT15BY0
Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
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ST7LITE1xB
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
7.6.3 Low Power Modes
7.6.3.1 Interrupts
The AVD interrupt event generates an interrupt if
the corresponding Enable Control Bit (AVDIE) is
34/159
1
WAIT
HALT
Mode
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
The SICSR register is frozen.
The AVD remains active.
Description
set and the interrupt mask in the CC register is re-
set (RIM instruction).
AVD event
Interrupt Event
Event
AVDF
Flag
Control
Enable
AVDIE
Bit
from
Wait
Exit
Yes
from
Exit
Halt
No
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