ST7LIT15BY0 STMicroelectronics, ST7LIT15BY0 Datasheet - Page 57
ST7LIT15BY0
Manufacturer Part Number
ST7LIT15BY0
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
Manufacturer
STMicroelectronics
Datasheet
1.ST7LIT10BF0.pdf
(159 pages)
Specifications of ST7LIT15BY0
Up To 4 Kbytes Single Voltage Extended Flash (xflash) Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
128 Bytes Data Eeprom With Read-out Protection. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55˚C.
Clock Sources
Internal 1% RC oscillator (on ST7FLITE15B and ST7FLITE19B), crystal/ceramic resonator or external clock
Five Power Saving Modes
Halt, Active-Halt, Auto Wake-up from Halt, Wait and Slow
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11.2 DUAL 12-BIT AUTORELOAD TIMER 4 (AT4)
11.2.1 Introduction
The 12-bit Autoreload Timer can be used for gen-
eral-purpose timing functions. It is based on one or
two free-running 12-bit upcounters with an input
capture register and four PWM output channels.
There are 7 external pins:
– Four PWM outputs
– ATIC/LTIC pins for the Input Capture function
– BREAK pin for forcing a break condition on the
11.2.2 Main Features
■
■
■
Figure 35. Single Timer Mode (ENCNTR2=0)
ATIC
PWM outputs
Single Timer or Dual Timer mode with two 12-bit
upcounters (CNTR1/CNTR2) and two 12-bit
autoreload registers (ATR1/ATR2)
Maskable overflow interrupts
PWM mode
Edge Detection Circuit
12-Bit Autoreload Register 1
Control
Clock
12-Bit Upcounter 1
1 ms from
Lite Timer
32MHz
OFF
f
CPU
OVF1 interrupt
12-bit Input Capture
PWM3 Duty Cycle Generator
PWM0 Duty Cycle Generator
PWM1 Duty Cycle Generator
PWM2 Duty Cycle Generator
■
■
■
■
■
■
– Generation of four independent PWMx signals
– Dead time generation for Half bridge driving
– Frequency 2 kHz - 4 MHz (@ 8 MHz f
– Programmable duty-cycles
– Polarity control
– Programmable output modes
– 12-bit input capture register (ATICR)
– Triggered by rising and falling edges
– Maskable IC interrupt
– Long range input capture
Output Compare Mode
Input Capture Mode
Internal/External Break control
Flexible Clock control
One Pulse mode on PWM2/3
Force Update
mode with programmable dead time
Output Compare
Dead Time
Generator
DTE bit
CMP
Interrupt
OE2
OE0
OE1
OE3
ST7LITE1xB
BPEN bit
CPU
57/159
PWM0
PWM1
PWM2
PWM3
)
1
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