L6615 STMicroelectronics, L6615 Datasheet - Page 16

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L6615

Manufacturer Part Number
L6615
Description
High/low side load share controller
Manufacturer
STMicroelectronics
Datasheet

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L6615
Consider, for example an application with V
at CS+:
is lower than 1.6V so the internal comparator triggers on the LSA structure and the pin CS- sources the
current I
namics of LSA spreads down to zero: in this case it is necessary to pay attention to the design of ADJ
network.
Now consider, for example, an application with V
voltage at CS+ pin could be very close to the threshold: if such voltage is overcome (start-up, load regu-
lation, overvoltage,…) , then the HSA structure will be activated; as nominal conditions are restored, the
hysteresis will then keep HSA active (unless V
8
The current sharing accuracy strongly depends on the unbalance between the relevant parameters of the
paralleled sections. Each percentage point on the relevant parameters tolerance introduces a maximum
error equal to the double of the tolerance.The L6615 introduces an inherent error in current sharing due
to the 40mV offset at the negative input of the error amplifier; this offset is necessary to guarantee the low
value of the master COMP pin.
Considering perfectly matched all other parameters, the offset introduces a percentage error equal to 4%
divided by the voltage on the share bus. In particular:
Being V
involved in the sharing, lower is the error.
Another error is introduced by the current sense amplifier due to its input offset whose amplitude can be
±1mV: being typically the drop across R
error of some percentage point.
Whenever the application requires very high current sharing accuracy, it is possible to correct these offsets
through a triggering process, introducing a trimmer (R
Referring to fig. 16, in case of high side sensing, the equations governing the circuit are:
where V
Solving for I
Ideally I
with 1:1 ratio and sent to CGA pin.
Imposing that the sum of two latter terms is zero it is possible to find the value of
the offset:
16/20
OFFSET TRIMMING
V
V
---------------------------- -
V
-------------------------------------------------------- -
P
G
SH
OUT
OUT
O
CS
= V
should be equal only to the first term: this current will be sunk by CS+ pin, internally mirrored
is the current sense amplifier input offset.
R
directly proportional to the load current and fixed the ratio R
(see paragraph "2. CURRENT SENSE SECTION"). The IC works properly because the dy-
G
G
M
+
, we get:
+ V
V
V
R
M
SENSE
G
O
OPT
=
I
G
---------------------------- -
1 –
=
=
1
-- -
2
V
V
V
--------------------- -
M
P
SENSE
R
2 V
----------------------------------------------------------------------------------------------------------------------------------------------------------- -
R
G
-------------- -
K
V
R
OUT
P
K
I
SLAV E
----------------------------- - V
=
R
R
SNS
I
R
V
G
G
K
K
CS+
OUT
+
=
about one hundred mV at full load, the offset could lead to an
R
R
= V
I
G
4 V
CS+
G
MAST ER
= 1.2V and the sense resistor placed high side; the voltage
OUT
OUT
falls under the lower threshold).
2
OUT
O
=1.5V where, because of the drop across R
2 V
+
- V
K
) between current sense input pins.
V
R
OUT
O
SENSE
1
2
G
+
R
40mA
--------------- -
V
K
V
------------------------------------------------------- -
2
O
S H
R
R
K
2
K
2
+
1 –
CGA
4 V
1
/R
2
O
+
G
, higher are the currents
R
R
G
G
deleting the effect of
R
K
SNS
, the

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