LNBH25L STMicroelectronics, LNBH25L Datasheet - Page 17

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LNBH25L

Manufacturer Part Number
LNBH25L
Description
LNB supply and control IC with step-up and IA?C interface
Manufacturer
STMicroelectronics
Datasheet

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LNBH25L
7.3
Table 6.
Table 7.
(MSB)
(MSB)
(LSB)
(LSB)
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
BIT
BIT
EXTM
Name
VSEL1
VSEL2
VSEL3
VSEL4
Data registers
The data 1..4 registers can be addressed both in write and read mode. In read mode they
return the last writing byte status received in the previous write transmission.
The following tables provide the register address values of data 1..4 and a function
description of each bit.
Data 1 (read/write register. Register address = 0X2)
N/A = Reserved bit.
All bits reset to “0” at power-on.
Data 2 (read/write register. Register address = 0X3)
N/A = Reserved bit.
All bits reset to “0” at power-on.
Name
TEN
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Value
Value
1
0
0
1
0
0
0
0
0
0
0/1
0/1
0/1
0/1
0
0
0
0
22 kHz tone enabled. Tone output controlled by the DSQIN pin
22 kHz tone output disabled
Reserved. Keep to “0”
DSQIN input pin is set to receive external 22 kHz TTL signal source
DSQIN input pin is set to receive external DiSEqC envelope TTL signal
Reserved. Keep to “0”
Reserved. Keep to “0”
Reserved. Keep to “0”
Reserved. Keep to “0”
Reserved. Keep to “0”
Output voltage selection bits. (Refer to
Reserved. Keep to “0”
Reserved. Keep to “0”
Reserved. Keep to “0”
Reserved. Keep to “0”
Doc ID 022634 Rev 2
Description
Description
Table 13
)
I²C interface protocol
17/28

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