DS1338 Maxim, DS1338 Datasheet
DS1338
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DS1338 Summary of contents
Page 1
... GENERAL DESCRIPTION The DS1338 serial real-time clock (RTC low- power, full binary-coded clock/calendar plus 56 bytes of NV SRAM. Address and data are transferred serially through an I interface. The clock/calendar provides seconds, minutes, hours, day, date, information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year ...
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... DS1338-18 1.89V CC DS1338- 3.30V CC I CCA V = 3.63V CC DS1338- 5.5V CC DS1338-18 1.89V CC DS1338- 3.30V CC I CCS V = 3.63V CC DS1338- 5. BATLKG DS1338 I C RTC with 56-Byte NV RAM = +25°C, unless A MIN TYP MAX 1.71 1.8 5.5 2.7 3.0 5.5 3.0 3.3 5.5 0 0.3 CC +0 1.51 1.62 1.71 2.45 2.59 2.70 2.70 2.82 2.97 1.3 3.0 3.7 = TYP, CC MIN TYP ...
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... Standard mode Fast mode t F Standard mode Fast mode t SU:STO Standard mode C (Note 12 (Note 13) I/O (Note 14) t OSF DS1338 I C RTC with 56-Byte NV RAM = 3.0V +25°C, unless BAT A MIN TYP MAX I 800 1200 BATOSC1 I 1025 1400 BATOSC2 I 10 100 ...
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... SYMBOL t REC t VCCF t VCCR ≤ 3.7V. BAT t VCCF DON'T CARE HIGH DS1338 I C RTC with 56-Byte NV RAM MIN TYP MAX 2 300 0 of the SCL signal) to IH(MIN the SCL signal. LOW ≥ to 250ns must then be met. This is SU:DAT + t = 1000 + 250 = 1250ns before the SCL line ...
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... BAT SERIAL BUS SCL INTERFACE AND ADDRESS SDA REGISTER 1Hz/4.096kHz/8.192kHz/32.768kHz 1Hz Oscillator and divider CONTROL LOGIC DS1338 DS1338 I C RTC with 56-Byte NV RAM SQW/OUT MUX/ N BUFFER RAM ( CLOCK, CALENDAR, AND CONTROL REGISTERS USER BUFFER (7 BYTES) ...
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... I 1 BAT OSC (SQWE = 0) 150 125 100 75 50 1.8 2.3 Oscillator Frequency vs. Supply Voltage V =0V CC 32768.5 32768.4 32768.3 SQWE=0 32768.2 32768.1 32768.0 1.3 1 DS1338 I C RTC with 56-Byte NV RAM I vs SCL=400kHz SCL=SDA=0Hz 2.8 3.3 3.8 4.3 4.8 5.3 V (V) CC 2.3 2.8 3.3 3.8 4.3 4.8 Oscillator Supply Voltage (V) ...
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... N.C. DETAILED DESCRIPTION The DS1338 serial RTC is a low-power, full BCD clock/calendar plus 56 bytes of NV SRAM. Address and data are transferred serially through an I month, and year information. The end of the month date is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicator ...
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... OPERATION The DS1338 operates as a slave device on the serial bus. Access is obtained by implementing a START condition and providing a device identification code, followed by data. Subsequent registers can be accessed sequentially until a STOP condition is executed. The device is fully accessible and data can be written and read when V greater than V ...
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... Refer to Application Note 58: Crystal Considerations with Dallas Real-Time Clocks for detailed information. DS1338C ONLY The DS1338C integrates a standard 32,768Hz crystal in the package. Typical accuracy at nominal V is approximately 10ppm. Refer to Application Note 58 for information about crystal accuracy vs. temperature. Figure 4. Typical PC Board Layout for Crystal ...
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... The 1Hz square-wave output, if enabled, transitions high 500ms after the seconds data transfer, provided the oscillator is already running. The DS1338 runs in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the 12-hour or 24-hour mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit, with logic high being PM. In the 24-hour mode, bit 5 is the 20-hour bit (20– ...
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... 32.768kHz BIT 5 BIT 4 OSF SQWE 1 1 and V are insufficient to support oscillation. CC BAT SQWE 1Hz 1 4.096kHz 1 8.192kHz DS1338 I C RTC with 56-Byte NV RAM BIT 3 BIT 2 BIT RS1 BIT 0 RS0 1 ...
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... I C bus. Within the bus specifications, a standard mode (100kHz maximum clock rate) and a fast mode (400kHz maximum clock rate) are defined. The DS1338 works in both modes. Connections to the bus are made through the open-drain I/O lines SDA and SCL. ...
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... SDA line. After the DS1338 acknowledges the slave address and write bit, the master transmits a register address to the DS1338. This sets the register pointer on the DS1338, with DS1338 acknowledging the transfer. The master may then transmit zero or more bytes of data, with the DS1338 acknowledging each byte received ...
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... NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK <Word Address (n)> <Slave Address> XXXXXXXX A Sr 1101000 <Data (n+1)> <Data (n+2)> XXXXXXXX A XXXXXXXX A MASTER TO SLAVE SLAVE TO MASTER DS1338 I C RTC with 56-Byte NV RAM <Data (n+X)> ... XXXXXXXX A P <Data (n+2)> <Data (n+X)> A ... XXXXXXXX A P DATA TRANSFERRED 1 A <Data (n+X)> ... XXXXXXXX A P ...
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... HANDLING, PCB LAYOUT, AND ASSEMBLY The DS1338C package contains a quartz tuning-fork crystal. Pick-and-place equipment may be used, but precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage to the crystal. Exposure to reflow is limited to 2 times maximum. Avoid running signal traces under the package, unless a ground plane is placed between the package and the signal line ...
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... © 2012 Maxim Integrated Products DS1338 I DESCRIPTION Maxim is a registered trademark of Maxim Integrated Products, Inc ...