DS80C400 Maxim, DS80C400 Datasheet - Page 59

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DS80C400

Manufacturer Part Number
DS80C400
Description
The DS80C400 network microcontroller offers the highest integration available in an 8051 device
Manufacturer
Maxim
Datasheet

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CSR Register:
Register Address:
Bit Names:
Reset State:
WUFD [31:0], Wake-Up Frame Filter Data [31:0]. These 32 bits are used to access the four available network
wake-up frame filters. Eight accesses to the wake-up frame filter register are needed to read or write all four wake-
up frame filters.
CSR Register:
Register Address:
Bit Names:
Reset State:
*Power-on reset only. Unaffected by other reset sources.
GU, Global Unicast
0 = frames must pass the destination address filter as well as the wake-up frame filter criteria in order to generate a
wake-up event (default)
1 = frames must pass only the wake-up frame filter criteria to generate a wake-up event
WUFF, Wake-Up Frame Received Flag. This bit is set to logic 1 to indicate when a wake-up event was generated
due to the reception of a network wake-up frame. Application software must clear this flag by writing a 1 to this bit.
MPF, Magic Packet Received Flag. This bit is set to logic 1 to indicate when a wake-up event was generated due
to the reception of a Magic Packet. Application software must clear this flag by writing a 1 to this bit.
WUFE, Wake-Up Frame Enable. Setting this bit to logic 1 invokes sleep mode and allows the reception of network
wake-up frame to generate a wake-up event.
MPE, Magic Packet Enable. Setting this bit to logic 1 invokes sleep mode and allows the reception of a Magic
Packet to generate a wake-up event.
31
23
15
7
31
23
15
7
31
23
15
7
31
23
15
7
0
0
0
0
0
0
0
0
WUFF
Wake-Up Frame Filter
28h
Wake-Up Events Control and Status
2Ch
0
0
0
0
0
0
0
0
*
MPF
0
0
0
0
0
0
0
0
*
WUFD [31:24]
WUFD [23:16]
WUFD [15:8]
0
0
0
0
0
0
0
0
WUFD [7:0]
59 of 97
0
0
0
0
0
0
0
0
WUFE
0
0
0
0
0
0
0
0
MPE
GU
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
24
16
8
0
24
16
8
0
24
16
8
0
24
16
8
0

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