DS80C411 Maxim, DS80C411 Datasheet - Page 47

• Manufacturer Part Number: DS80C411
• Description: The DS80C410/DS80C411 network microcontrollers offer the highest integration available in an 8051 device
• Manufacturer: Maxim

Figure 1. Example External Memory Map—Merged Program/Data
Enhanced Quad Data Pointers
The DS80C410 offers enhanced features for accelerating the access and movement of data. It contains four data
pointers (DPTR0, DPTR1, DPTR2, and DPTR3), in comparison to the single data pointer offered on the original
8051, and allows the user to define, for each data pointer, whether the INC DPTR instruction increments or
decrements the selected pointer. Also, realizing that many data accesses occur in large contiguous blocks, the
DS80C410 can be configured to automatically increment or decrement a data pointer on execution of certain
instructions. This improvement greatly speeds access to consecutive pieces of data since hardware can now
accomplish a task (advancing the data pointer) that previously required software execution time. Finally, each pair
of data pointers (DPTR0, DPTR1 or DPTR2, DPTR3) can be configured for an auto-toggle mode. When placed into
this mode, certain data pointer-related instructions toggle the active data-pointer selection to the other pointer in the
pair. Enabling the auto-toggle feature, with one pointer to source data and a second pointer to destination data,
greatly speeds the copying of large data blocks.
DPTR0 is located at the same address as the original 8051 data pointer, allowing the DS80C410 to execute
standard 8051 code with no modifications. The registers making up the second, third, and fourth data pointers are
located at SFR address locations not used in the original 8051. To access the extended 24-bit address range
supported by the DS80C410, a third, high-order byte (DPXn) has been added to each pointer so that each data
pointer is now composed of the SFR combination DPXn+DPHn+DPLn.
up each data pointer.
CE7
CE0
CE4
CE3
CE2
CE1
PROGRAM
CE6
CE5
MEMORY
= 2M x 8
= 2M x 8
= 2M x 8
=2M x 8
=2M x 8
= 2M x 8
= 2M x 8
=2M x 8
BEFORE
PCE0
PCE3
PCE2
PCE1
MEMORY
DATA
= 1M x 8
= 1M x 8
= 1M x 8
= 1M x 8
PDCE3
PDCE0
= 1
= 1
47 of 102
CE7
CE2
CE4
PROGRAM
CE6
CE5
CE1
MEMORY
= 2M x 8
= 2M x 8
= 2M x 8
= 2M x 8
= 2M x 8
= 2M x 8
Table 8
CE0
CE3
PROGRAM/
summarizes the SFRs that make
MEMORY
AFTER
DATA
= 2M x 8
= 2M x 8
PCE3
PCE2
MEMORY
DATA
= 1M x 8
= 1M x 8