DS80C411 Maxim, DS80C411 Datasheet - Page 50

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DS80C411

Manufacturer Part Number
DS80C411
Description
The DS80C410/DS80C411 network microcontrollers offer the highest integration available in an 8051 device
Manufacturer
Maxim
Datasheet

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Table 9. Data Memory Cycle Stretch Values
Note 1: All internal MOVX operations execute at the 0 stretch setting.
Note 2: Default stretch setting for external MOVX operations following reset, prior to execution of internal ROM.
Internal MOVX SRAM
The DS80C410/411 incorporates 73.25kBytes on-chip SRAM for MOVX memory. The on-chip SRAM is physically
divided into four memory blocks: a dedicated 64Kx8 data or program/data memory, a 1Kx8 memory block for
extended stack or data memory, and 256 bytes of dual port RAM for control and storage of CAN messages. The
address locations of these four blocks are fixed and cannot be altered.
configuration of the DS80C410.
Figure 2. Internal Data Memory
The 8kB (2kx32) block is used by the Ethernet MAC as frame-buffer memory for incoming or outgoing packet data
and can, at the same time, be accessed by the DS80C410 as MOVX data memory. While the MAC is in use,
special care should be taken by user software to prevent undesirable MOVX writes from corrupting frame-buffer
memory. Note: that when the SA bit (ACON.2) is set, 1kB of the MOVX data memory is accessed by the 10-bit
MD2
0
0
0
0
1
1
1
1
MD1
0
0
1
1
0
0
1
1
FFDBFF
FFDFFF
FFDC00
FFDB00
FFFFFF
FFE000
00FFFF
000000
MD0
0
1
0
1
0
1
0
1
INTERNAL DATA MEMORY
STRETCH
0 (Note 1)
1 (Note 2)
(CAN DATA MEMORY)
VALUE
(DATA MEMORY OR
(DATA MEMORY OR
NETWORK BUFFER
OPTIONAL STACK)
(DATA MEMORY)
2
3
4
5
6
7
256x8 DPSRAM
2Kx32 SRAM
64Kx8 SRAM
1Kx8 SRAM
MEMORY)
MACHINE
CYCLES
MOVX
10
11
12
2
3
4
5
9
50 of 102
CD1:0 = 00)
(4X/2X = 1
0.5 t
1 t
2 t
3 t
4 t
5 t
6 t
7 t
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
APPROXIMATE RD, WR PULSE WIDTH
CD1:0 = 00)
(IN OSCILLATOR CLOCKS)
(4X/2X = 0
10 t
12 t
14 t
1 t
2 t
4 t
6 t
8 t
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
Figure 2
CD1:0 = 10)
(4X/2X = X
shows the default memory
12 t
16 t
20 t
24 t
28 t
2 t
4 t
8 t
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CD1:0 = 11)
(4X/2X = X
1024 t
2048 t
3072 t
4096 t
5120 t
6144 t
7168 t
512 t
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK

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